MC68HC05P18 Datasheet, PDF (25/144 Pages) Freescale Semiconductor, Inc – Advance Information

1.5.9 TCMP
Freescale Semiconductor, Inc.
General Description
Functional Pin Description
This pin is the output from the 16-bit timer’s output compare function. It
is low after reset. For further information, refer to Section 10. 16-Bit
Timer.
1.5.10 Maskable Interrupt Request (IRQ)
This input pin drives the asynchronous interrupt function of the MCU.
The MCU will complete the current instruction being executed before it
responds to the IRQ interrupt request. When IRQ is driven low, the event
is latched internally to signify an interrupt has been requested. When the
MCU completes its current instruction, the interrupt latch is tested. If the
interrupt latch is set and the interrupt mask bit (I bit) in the condition code
register is clear, the MCU will begin the interrupt sequence.
Depending on the mask option selected for the MC68HC05P18 or the
programming option selected in mask option register 1 (MOR1) for the
MC68HC805P18, the IRQ pin will trigger this interrupt on either a
negative-going edge at the IRQ pin and/or while the IRQ pin is held in
the low state. In either case, the IRQ pin must be held low for at least one
t_ILIH time period. The IRQ input requires an external resistor connected
to V_DD for wired-OR operation if:
• For the MC68HC05P18, the edge- and level-sensitive mask
option is selected.
• For the MC68HC805P18, the edge- and level-sensitive edge is
programmed in the MOR1.
If the IRQ pin is not used, it must be tied to the V_DD supply. The IRQ pin
contains an internal Schmitt trigger as part of its input circuitry to improve
noise immunity. For further information, refer to Section 4. Interrupts.
NOTE:
For the MC68HC805P18, if the voltage level applied to the IRQ pin
exceeds V_DD, it may affect the MCU’s mode of operation. See
Section 6. Operating Modes.
MC68HC(8)05P18 — Rev. 2.0
MOTOROLA
General Description
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Advance Information
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