MC68HC05P18 Datasheet, PDF (114/144 Pages) Freescale Semiconductor, Inc – Advance Information

Instruction Set
Freescale Semiconductor, Inc.
12.4.4 Bit Manipulation Instructions
The CPU can set or clear any writable bit in the first 256 bytes of
memory. Port registers, port data direction registers, timer registers, and
on-chip RAM locations are in the first 256 bytes of memory. The CPU
can also test and branch based on the state of any bit in any of the first
256 memory locations. Bit manipulation instructions use direct
addressing. Table 12-4 lists these instructions.
Table 12-4. Bit Manipulation Instructions
Instruction
Clear bit
Branch if bit clear
Branch if bit set
Set bit
Mnemonic
BCLR
BRCLR
BRSET
BSET
12.4.5 Control Instructions
These register reference instructions control CPU operation during
program execution. Control instructions, listed in Table 12-5, use
inherent addressing.
Table 12-5. Control Instructions
Instruction
Clear carry bit
Clear interrupt mask
No operation
Reset stack pointer
Return from interrupt
Return from subroutine
Set carry bit
Set interrupt mask
Stop oscillator and enable IRQ pin
Software interrupt
Transfer accumulator to index register
Transfer index register to accumulator
Stop CPU clock and enable interrupts
Mnemonic
CLC
CLI
NOP
RSP
RTI
RTS
SEC
SEI
STOP
SWI
TAX
TXA
WAIT
Advance Information
114
MC68HC(8)05P18 — Rev. 2.0
Instruction Set
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