MC68HC05P18 Datasheet, PDF (112/144 Pages) Freescale Semiconductor, Inc – Advance Information

Instruction Set
Freescale Semiconductor, Inc.
12.4.2 Read-Modify-Write Instructions
These instructions read a memory location or a register, modify its
contents, and write the modified value back to the memory location or to
the register. The test for negative or zero instruction (TST) is an
exception to the read-modify-write sequence because it does not write a
replacement value. Table 12-2 lists the read-modify-write instructions.
Table 12-2. Read-Modify-Write Instructions
Instruction
Arithmetic shift left
Arithmetic shift right
Clear bit in memory
Set bit in memory
Clear
Complement (one’s complement)
Decrement
Increment
Logical shift left
Logical shift right
Negate (two’s complement)
Rotate left through carry bit
Rotate right through carry bit
Test for negative or zero
Mnemonic
ASL
ASR
BCLR
BSET
CLR
COM
DEC
INC
LSL
LSR
NEG
ROL
ROR
TST
12.4.3 Jump/Branch Instructions
Jump instructions allow the CPU to interrupt the normal sequence of the
program counter. The unconditional jump instruction (JMP) and the
jump- to-subroutine instruction (JSR) have no register operand. Branch
instructions allow the CPU to interrupt the normal sequence of the
program counter when a test condition is met. If the test condition is not
met, the branch is not performed. All branch instructions use relative
addressing.
Bit test and branch instructions cause a branch based on the state of any
readable bit in the first 256 memory locations. These 3-byte instructions
Advance Information
112
MC68HC(8)05P18 — Rev. 2.0
Instruction Set
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