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MC68HC05P18 Datasheet, PDF (68/144 Pages) Freescale Semiconductor, Inc – Advance Information
Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
7.7 I/O Port Programming
Each pin on port A through port D (except pin 7 of port D) may be
programmed as an input or an output under software control as shown
in Table 7-1, Table 7-2, Table 7-3, and Table 7-4. The direction of a pin
is determined by the state of its corresponding bit in the associated port
data direction register (DDR). A pin is configured as an output if its
corresponding DDR bit is set to a logic 1. A pin is configured as an input
if its corresponding DDR bit is cleared to a logic 0.
Table 7-1. Port A I/O Functions
DDRA
I/O Pin Mode
Access to DDRA
@ $0004
Read/Write
0
Input, high impedance DDRA0–DDRA7
1
Output
DDRA0–DDRA157
*Does not affect input, but stored to data register
Access to Data
Register @ $0000
Read
Write
I/O pin
*
PA0–PA7 PA0–PA7
Table 7-2. Port B I/O Functions
DDRB
I/O Pin Mode
Access to DDRA
@ $0005
Read/Write
0
Input, high impedance DDRB5–DDRB7
1
Output
DDRB5–DDRB7
*Does not affect input, but stored to data register
Access to Data
Register @ $0001
Read
Write
I/O pin
*
PB5–PB7 PB5–PB7
Advance Information
68
Table 7-3. Port C I/O Functions
DDRA
I/O Pin Mode
Access to DDRA
@ $0006
Read/Write
0
Input, high impedance DDRC0–DDRC7
1
Output
DDRC0–DDRC7
*Does not affect input, but stored to data register
Accesses to Data
Register @ $0002
Read
Write
I/O pin
*
PC0–PC7 PC0–PC7
MC68HC(8)05P18 — Rev. 2.0
Input/Output (I/O) Ports
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