MC68HC08GP32A Datasheet, PDF (61/258 Pages) Freescale Semiconductor, Inc – Microcontrollers

CGM Registers
Address:
Read:
Write:
Reset:
$0037
Bit 7
AUTO
0
6
5
LOCK
ACQ
0
0
= Unimplemented
4
3
2
0
0
0
0
0
0
R = Reserved
1
Bit 0
0
R
0
0
Figure 4-6. PLL Bandwidth Control Register (PBWC)
AUTO — Automatic Bandwidth Control Bit
This read/write bit selects automatic or manual bandwidth control. When initializing the PLL for manual
operation (AUTO = 0), clear the ACQ bit before turning on the PLL. Reset clears the AUTO bit.
1 = Automatic bandwidth control
0 = Manual bandwidth control
LOCK — Lock Indicator Bit
When the AUTO bit is set, LOCK is a read-only bit that becomes set when the VCO clock, CGMVCLK,
is locked (running at the programmed frequency). When the AUTO bit is clear, LOCK reads as 0 and
has no meaning. The write one function of this bit is reserved for test, so this bit must always be written
a 0. Reset clears the LOCK bit.
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
ACQ — Acquisition Mode Bit
When the AUTO bit is set, ACQ is a read-only bit that indicates whether the PLL is in acquisition mode
or tracking mode. When the AUTO bit is clear, ACQ is a read/write bit that controls whether the PLL is
in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written value from manual operation is
stored in a temporary location and is recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
1 = Tracking mode
0 = Acquisition mode
4.5.3 PLL Multiplier Select Register High
The PLL multiplier select register high (PMSH) contains the programming information for the high byte of
the modulo feedback divider.
Address:
Read:
Write:
Reset:
$0038
Bit 7
6
5
4
3
2
1
0
0
0
0
MUL11 MUL10 MUL9
0
0
0
0
0
0
0
= Unimplemented
Figure 4-7. PLL Multiplier Select Register High (PMSH)
Bit 0
MUL8
0
MUL11–MUL8 — Multiplier Select Bits
These read/write bits control the high byte of the modulo feedback divider that selects the VCO
frequency multiplier N. (See 4.3.3 PLL Circuits and 4.3.6 Programming the PLL.) A value of $0000 in
MC68HC08GP32A • MC68HC08GP16A Data Sheet, Rev. 1.0
Freescale Semiconductor
61