MC68HC08GP32A Datasheet, PDF (35/258 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
2
$FE07
↓
$FE08
Read:
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
Break Address ^Read: _{Bit 15}
14
13
12
11
10
$FE09
Register High (BRKH) Write:
See page 222. _Reset:
0
0
0
0
0
0
Break Address Read:
$FE0A
Register Low (BRKL)
See page 222.
Write:
Bit 7
6
5
4
3
2
Reset: 0
0
0
0
0
0
Break Status and Control Read:
0
0
0
0
$FE0B
Register (BRKSCR)
See page 221.
Write:
BRKE
BRKA
Reset: 0
0
0
0
0
0
LVI Status Register ^{Read: LVIOUT}
0
0
0
0
0
$FE0C
(LVISR) Write:
See page 101. _Reset:
0
0
0
0
0
0
1
Bit 0
R
R
0
0
9
Bit 8
0
0
1
Bit 0
0
0
0
0
0
0
0
0
0
0
$FFFF
COP Control Register ^Read:
(COPCTL) Write:
See page 69. _Reset:
LOW BYTE OF RESET VECTOR
WRITING CLEARS COP COUNTER (ANY VALUE)
Unaffected by reset
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 7)
MC68HC08GP32A • MC68HC08GP16A Data Sheet, Rev. 1.0
Freescale Semiconductor
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