MC908GR32AVFAE Datasheet, PDF (47/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH-1 Memory (FLASH-1)
2.6.6 FLASH-1 Program Operation
Programming of the FLASH-1 memory is done on a row basis. A row consists of 64 consecutive bytes
with address ranges as follows:
• $XX00 to $XX3F
• $XX40 to $XX7F
• $XX80 to $XXBF
• $XXC0 to $XXFF
During the programming cycle, make sure that all addresses being written to fit within one of the ranges
specified above. Attempts to program addresses in different row ranges in one programming cycle will fail.
Use this step-by-step procedure to program a row of FLASH-1 memory.
NOTE
Only bytes which are currently $FF may be programmed.
1. Set the PGM bit in the FLASH-1 control register (FL1CR). This configures the memory for program
operation and enables the latching of address and data programming.
2. Read the FLASH-1 block protect register (FL1BPR).
3. Write to any FLASH-1 address within the row address range desired with any data.
4. Wait for time, t_NVS (minimum 10 μs).
5. Set the HVEN bit.
6. Wait for time, t_PGS (minimum 5 μs).
7. Write data byte to the FLASH-1 address to be programmed.
8. Wait for time, t_PROG (minimum 30 μs).
9. Repeat steps 7 and 8 until all the bytes within the row are programmed.
10. Clear the PGM bit.
11. Wait for time, t_NVH (minimum 5 μs)
12. Clear the HVEN bit.
13. Wait for a time, t_RCV, (typically 1 μs) after which the memory can be accessed in normal read mode.
The FLASH programming algorithm flowchart is shown in Figure 2-6.
NOTE
A. Programming and erasing of FLASH locations can not be performed by code being executed from the
same FLASH array.
B. While these operations must be performed in the order shown, other unrelated operations may occur
between the steps. However, care must be taken to ensure that these operations do not access any
address within the FLASH array memory space such as the COP control register (COPCTL) at
$FFFF.
C. It is highly recommended that interrupts be disabled during program/erase operations.
D. Do not exceed t_PROG maximum or t_HV maximum. t_HV is defined as the cumulative high voltage
programming time to the same row before next erase. t_HV must satisfy this condition:
t_NVS+ t_NVH + t_PGS + (t_PROG X 64) ≤ t_HV maximum
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Freescale Semiconductor
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