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MC908GR32AVFAE Datasheet, PDF (34/314 Pages) Freescale Semiconductor, Inc – Microcontrollers
Memory
Addr.
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
$002E
$002F
Register Name
TIM1 Counter Modulo Read:
Register Low (T1MODL) Write:
See page 236. Reset:
TIM1 Channel 0 Status and Read:
Control Register (T1SC0) Write:
See page 237. Reset:
TIM1 Channel 0 Read:
Register High (T1CH0H) Write:
See page 240. Reset:
TIM1 Channel 0 Read:
Register Low (T1CH0L) Write:
See page 240. Reset:
TIM1 Channel 1 Status and Read:
Control Register (T1SC1) Write:
See page 237. Reset:
TIM1 Channel 1 Read:
Register High (T1CH1H) Write:
See page 240. Reset:
TIM1 Channel 1 Read:
Register Low (T1CH1L) Write:
See page 240. Reset:
TIM2 Status and Control Read:
Register (T2SC) Write:
See page 237. Reset:
TIM2 Counter Read:
Register High (T2CNTH) Write:
See page 235. Reset:
TIM2 Counter Read:
Register Low (T2CNTL) Write:
See page 235. Reset:
TIM2 Counter Modulo Read:
Register High (T2MODH) Write:
See page 236. Reset:
TIM2 Counter Modulo Read:
Register Low (T2MODL) Write:
See page 236. Reset:
Bit 7
Bit 7
1
CH0F
0
0
Bit 15
Bit 7
CH1F
0
0
Bit 15
Bit 7
TOF
0
0
Bit 15
0
Bit 7
0
Bit 15
1
Bit 7
1
6
6
1
CH0IE
0
14
6
CH1IE
0
14
6
TOIE
0
14
5
4
3
2
5
4
3
2
1
1
1
1
MS0B MS0A ELS0B ELS0A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
13
12
11
10
Indeterminate after reset
5
4
3
2
Indeterminate after reset
0
0
TSTOP
PS2
TRST
1
0
0
0
13
12
11
10
1
1
1
TOV0
0
9
1
TOV1
0
9
1
PS1
0
9
0
0
0
0
0
0
6
5
4
3
2
1
0
0
14
13
1
1
6
5
1
1
= Unimplemented
0
0
12
11
1
1
4
3
1
1
R = Reserved
0
0
10
9
1
1
2
1
1
1
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 9)
Bit 0
Bit 0
1
CH0MAX
0
Bit 8
Bit 0
CH1MAX
0
Bit 8
Bit 0
PS0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
34
Freescale Semiconductor