MC908GR32AVFAE Datasheet, PDF (238/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module (TIM1)
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin (see Table 17-2).
Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM1 status and control register (T1SC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin. Table 17-2 shows how ELSxB and ELSxA work. Reset clears
the ELSxB and ELSxA bits.
Table 17-2. Mode, Edge, and Level Selection
MSxB
X
X
0
0
0
0
0
0
0
1
1
1
MSxA
0
1
0
0
0
1
1
1
1
X
X
X
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Mode
Configuration
Output preset
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Input capture
Capture on falling edge only
Capture on rising
or falling edge
Software compare only
Output compare ^{Toggle output on compare}
or PWM
Clear output on compare
Set output on compare
Buffered
output
compare or
buffered PWM
Toggle output on compare
Clear output on compare
Set output on compare
NOTE
After initially enabling a TIM1 channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
TOVx — Toggle-On-Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM1 counter overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM1 counter overflow.
0 = Channel x pin does not toggle on TIM1 counter overflow.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
238
Freescale Semiconductor