MC908GR32AVFAE Datasheet, PDF (42/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
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NOTE
A security feature prevents viewing of the FLASH contents.⁽¹⁾
2.6.2 FLASH-1 Control and Block Protect Registers
The FLASH-1 array has two registers that control its operation, the FLASH-1 control register (FL1CR) and
the FLASH-1 block protect register (FL1BPR).
2.6.2.1 FLASH-1 Control Register
The FLASH-1 control register (FL1CR) controls FLASH program and erase operations.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
HVEN MASS ERASE PGM
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 2-3. FLASH-1 Control Register (FL1CR)
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for program and erase operations
in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for
program or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
Setting this read/write bit configures the FLASH-1 array for mass erase operation.
1 = MASS erase operation selected
0 = MASS erase operation unselected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation unselected
PGM — Program Control Bit
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = Program operation selected
0 = Program operation unselected
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
unauthorized users.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
42
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