MC908GR32AVFAE Datasheet, PDF (36/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
$003C
$003D
$003E
$003F
$0440
$0441
$0444
$0445
$0448
$0456
$0457
$0458
Register Name
ADC Status and Control ^Read:
Register (ADSCR) Write:
See page 65. _Reset:
ADC Data High Register ^Read:
(ADRH) Write:
See page 67. _Reset:
ADC Data Low Register ^Read:
(ADRL) Write:
See page 67. _Reset:
ADC Clock Register ^Read:
(ADCLK) Write:
See page 69. _Reset:
Port F Data Register ^Read:
(PTF) Write:
See page 147. _Reset:
Port G Data Register ^Read:
(PTG) Write:
See page 149. _Reset:
Data Direction Register F ^Read:
(DDRF) Write:
See page 148. _Reset:
Data Direction Register G ^Read:
(DDRG) Write:
See page 150. _Reset:
Keyboard Interrupt Read:
Polarity Register _Write:
(INTKBIPR)
See page 119. ^Reset:
TIM2 Channel 2 Status and ^Read:
Control Register (T2SC2) Write:
See page 255. _Reset:
TIM2 Channel 2 ^Read:
Register High (T2CH2H) Write:
See page 258. _Reset:
TIM2 Channel 2 ^Read:
Register Low (T2CH2L) Write:
See page 258. _Reset:
Bit 7
COCO
R
0
0
AD7
ADIV2
0
PTF7
PTG7
DDRF7
0
DDRG7
0
KBIP7
0
CH2F
0
0
Bit 15
Bit 7
6
5
4
3
2
1
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
0
0
1
1
1
1
0
0
0
0
0
AD9
Unaffected by reset
AD6
AD5
AD4
A3
AD2
AD1
ADIV1
0
PTF6
PTG6
DDRF6
0
DDRG6
0
KBIP6
ADIV0
0
PTF5
PTG5
DDRF5
0
DDRG5
0
KBIP5
Unaffected by reset
ADICLK MODE1
0
0
PTF4 PTAF3
Unaffected by reset
PTG4
PTG3
Unaffected by reset
DDRF4 DDRF3
0
0
DDRG4 DDRG3
0
0
KBIP4 KBIP3
MODE0
1
PTF2
PTG2
DDRF2
0
DDRG2
0
KBIP2
R
0
PTF1
PTG1
DDRF1
0
DDRG1
0
KBIP1
0
0
0
0
0
0
CH2IE MS2B MS2A ELS2B ELS2A TOV2
0
0
0
0
0
0
14
13
12
11
10
9
Indeterminate after reset
6
5
4
3
2
1
= Unimplemented
Indeterminate after reset
R = Reserved
U = Unaffected
Bit 0
ADCH0
1
AD8
AD0
0
0
PTF0
PTG0
DDRF0
0
DDRG0
0
KBIP0
0
CH2MAX
0
Bit 8
Bit 0
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 9)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
36
Freescale Semiconductor