MC908GR32AVFAE Datasheet, PDF (194/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
Table 14-3. Interrupt Sources
Source
Flag
Mask⁽¹⁾
INT Register
Flag
Priority⁽²⁾
Vector
Address
Reset
None
None
None
0
$FFFE–$FFFF
SWI instruction
None
None
None
0
$FFFC–$FFFD
IRQ pin
IRQF
IMASK1
IF1
1
$FFFA–$FFFB
CGM change in lock
PLLF
PLLIE
IF2
2
$FFF8–$FFF9
TIM1 channel 0
CH0F
CH0IE
IF3
3
$FFF6–$FFF7
TIM1 channel 1
CH1F
CH1IE
IF4
4
$FFF4–$FFF5
TIM1 overflow
TOF
TOIE
IF5
5
$FFF2–$FFF3
TIM2 channel 0
CH0F
CH0IE
IF6
6
$FFF0–$FFF1
TIM2 channel 1
CH1F
CH1IE
IF7
7
$FFEE–$FFEF
TIM2 overflow
TOF
TOIE
IF8
8
$FFEC–$FFED
SPI receiver full
SPRF
SPRIE
SPI overflow
OVRF
ERRIE
IF9
9
$FFEA–$FFEB
SPI mode fault
MODF
ERRIE
SPI transmitter empty
SPTE
SPTIE
IF10
10
$FFE8–$FFE9
SCI receiver overrun
OR
ORIE
SCI noise flag
SCI framing error
NF
NEIE
FE
FEIE
IF11
11
$FFE6–$FFE7
SCI parity error
PE
PEIE
SCI receiver full
SCI input idle
SCRF
IDLE
SCRIE
ILIE
IF12
12
$FFE4–$FFE5
SCI transmitter empty
SCI transmission complete
SCTE
TC
SCTIE
TCIE
IF13
13
$FFE2–$FFE3
Keyboard pin
KEYF
IMASKK
IF14
14
$FFE0–$FFE1
ADC conversion complete
COCO
AIEN
IF15
15
$FFDE–$FFDF
Timebase
TBIF
TBIE
IF16
16
$FFDC–$FFDD
TIM2 channel 2
CH2F
CH2IE
IF21
21
$FFD2–FFD3
TIM2 channel 3
CH3F
CH3IE
IF22
22
$FFD0–FFD1
TIM2 channel 4
CH4F
CH4IE
IF23
23
$FFCE–FFCF
TIM2 channel 5
CH5F
CH5IE
IF24
24
$FFCC–FFCD
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
2. 0 = highest priority
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
194
Freescale Semiconductor