MC908GR32AVFAE Datasheet, PDF (174/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI) Module
13.8.7 ESCI Baud Rate Register
The ESCI baud rate register (SCBR) together with the ESCI prescaler register selects the baud rate for
both the receiver and the transmitter.
NOTE
There are two prescalers available to adjust the baud rate. One in the ESCI
baud rate register and one in the ESCI prescaler register.
Address:
Read:
Write:
Reset:
$0019
Bit 7
6
5
4
3
2
1
LINT
LINR
SCP1
SCP0
R
SCR2
SCR1
0
0
0
0
0
0
0
R
= Reserved
Figure 13-17. ESCI Baud Rate Register (SCBR)
Bit 0
SCR0
0
LINT — LIN Transmit Enable
This read/write bit selects the enhanced ESCI features for the local interconnect network (LIN) protocol
as shown in Table 13-6. Reset clears LINT.
LINR — LIN Receiver Bits
This read/write bit selects the enhanced ESCI features for the local interconnect network (LIN) protocol
as shown in Table 13-6. Reset clears LINR.
Table 13-6. ESCI LIN Control Bits
LINT
0
0
0
1
1
1
1
LINR
0
1
1
0
0
1
1
M
Functionality
X Normal ESCI functionality
0 11-bit break detect enabled for LIN receiver
1 12-bit break detect enabled for LIN receiver
0 13-bit generation enabled for LIN transmitter
1 14-bit generation enabled for LIN transmitter
0 11-bit break detect/13-bit generation enabled for LIN
1 12-bit break detect/14-bit generation enabled for LIN
In LIN (version 1.2) systems, the master node transmits a break character which will appear as
11.05–14.95 dominant bits to the slave node. A data character of 0x00 sent from the master might
appear as 7.65–10.35 dominant bit times. This is due to the oscillator tolerance requirement that the
slave node must be within ±15% of the master node's oscillator. Since a slave node cannot know if it
is running faster or slower than the master node (prior to synchronization), the LINR bit allows the slave
node to differentiate between a 0x00 character of 10.35 bits and a break character of 11.05 bits. The
break symbol length must be verified in software in any case, but the LINR bit serves as a filter,
preventing false detections of break characters that are really 0x00 data characters.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
174
Freescale Semiconductor