MC908GR32AVFAE Datasheet, PDF (153/314 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pin Name Conventions
13.3 Pin Name Conventions
The generic names of the ESCI input/output (I/O) pins are:
• RxD (receive data)
• TxD (transmit data)
ESCI I/O lines are implemented by sharing parallel I/O port pins. The full name of an ESCI input or output
reflects the name of the shared port pin. Table 13-1 shows the full names and the generic names of the
ESCI I/O pins. The generic pin names appear in the text of this section.
Table 13-1. Pin Name Conventions
Generic Pin Names
Full Pin Names
RxD
PTE1/RxD
TxD
PTE0/TxD
13.4 Functional Description
Figure 13-3 shows the structure of the ESCI module. The ESCI allows full-duplex, asynchronous, NRZ
serial communication between the MCU and remote devices, including other MCUs. The transmitter and
receiver of the ESCI operate independently, although they use the same baud rate generator. During
normal operation, the CPU monitors the status of the ESCI, writes the data to be transmitted, and
processes received data.
The baud rate clock source for the ESCI can be selected via the configuration bit, SCIBDSRC, of the
CONFIG2 register ($001E)
For reference, a summary of the ESCI module input/output registers is provided in Figure 13-4.
13.4.1 Data Format
The SCI uses the standard non-return-to-zero mark/space data format illustrated in Figure 13-2.
PARITY
START
8-BIT DATA FORMAT
(BIT M IN SCC1 CLEAR)
OR DATA
BIT
NEXT
START
BIT _{BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP BIT}
BIT
PARITY
START
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
OR DATA
BIT
NEXT
START
BIT BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 _STOP BIT
BIT
Figure 13-2. SCI Data Formats
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Freescale Semiconductor
153