GM82C803CN Datasheet, PDF (9/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

GM82C803CN
3. CONFIGURATION
3.1 Configuration Register
The GM82C803CN has configuration registers. The configuration registers can be set by software. Each
configuration register is pointed by the value of the index register, and the contents of the configuration
register is changed by writing data to the port 399H.
3.1.1 Device Identification Register (IDR : read only)
Index = C0
The contents of this is 3C for GM82C803CN.
3.1.2 Device Revision Register (RVR : read only)
Index = C1
This indicates revision number, the default is 00
3.1.3 Function Selection Register (FSR)
Index = C2
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit 1 Bit 0
0
0
0
1
1
0
1
1
PIO Mode
Uni-directional Mode
ECP
EPP
PIO Disable
(Table 3-1 PIO Port Mode Selection)
PIO Port Enable : default 11
(SeeTable 3-1)
UART1 Enable : default 0
UART2 Enable : default 0
FDC Enable : default 0
IDE Enable : default 0
Reserved : default 0
Game Chip Select : 1
Power Good : 0 default
(1 : enable,
0 : disable )