GM82C803CN Datasheet, PDF (14/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

GM82C803CN
3.1.16 Printer Control Register (PCR)
Index = D0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
3.1.17 MIDI Support Register (MSR)
Index = D1
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reserved : 0
Reserved : 0
IRQ Polarity : 0
Reserved : 0
EPP Version (0 : Ver.1.9) : 0
ECP + EPP (=1) : 0
EPP Direction by Register not by IOW
PIO bit 5 enable in PIO mode
MIDI 1 enable
MIDI 2 enable
1 : pins 25, 26 for IRRX2 , IRTX2
0 : pins 88, 89 for IRRX, IRTX (default)
UART1 output pin Tri-state in powerdown
UART2 output pin Tri-state in powerdown
IR loopback mode
Reserved
MIDI enable means UART clock is 24 MHz/12 instead of 24 MHz/13
3.1.18 Test Mode Register (TMR, T3R)
Index = D2, D4
These registers are used to support chip debugging and test.
The system should not access these.
3.1.19 Clock Mode Register (T2R)
Index = D3
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
reserved
Bypass ( 24MHz)
0 : 14.318MHz (default)
PLL lock (read only)
0 : lock in, 1 : abnormal operation
reserved
This register controls the operating mode of the clock generator. If you want to use 24MHz external clock,
you must change bit 1 of this register . Default = 0 (14.MHz clock)