GM82C803CN Datasheet, PDF (26/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

GM82C803CN
Table 4-5. Mode description.
Mode
000:
001:
010:
011:
100:
101:
110:
111:
Description
Standard Parallel Port mode. In this mode the FIFO is reset and common collector
drivers are used on the control lines (Strobe, AutoFd, Init and SelectIn). Setting the
direction bit will not tri-state the output drivers in this mode.
PS/2 Parallel Port mode. Same as above except that direction may be used to tri-state
the data lines and reading the data register returns the value on the data lines and not the
value in the data register. It is always best for the hardware design to read the value of
the lines and not the register, some old Centronics interfaces actually returned the reg.
value and not the wire value. All drivers have active pull-ups (push-pull).
Parallel port FIFO mode. This is the same as 000 except that PWords are written or
DMAed to the FIFO. FIFO data is automatically transmitted using the standard parallel
port protocol. Note that this mode is only useful when direction is 0. All drivers have
active pull-ups (push-pull).
ECP Parallel port mode. In the forward direction (direction is 0) PWords placed into the
ecpDFifo and bytes written to the ecpAFifo are placed in a single FIFO and transmitted
automatically to the peripheral using ECP Protocol. In the reverse direction (direction is
1) bytes are moved from the ECP parallel port and packed into PWords in the ecpDFifo.
All drivers have active active pull-ups (push-pull).
EPP mode. (If this option is enabled in the configuration register)
Reserved.
Test mode. In this mode the FIFO may be written and read, but the data will not be
transmitted on the parallel port.
Configuration mode. In this mode the confgA, confgB registers are accessible at 0x400
and 0x401.
OPERATION
Mode Switching/Software Control
Software will execute P1284 negotiation and all operation prior to a data transfer phase under programmed I/O control
(mode 000 or 001). Hardware provides an automatic control line handshake, moving data between the FIFO and ECP
port only in the data transfer phase (mode 011 or 010).
Setting the mode to 011 or 010 will cause the hardware to initiate data transfer.
If the port is in mode 000 or 001, it may switch to any other mode. If the port is not in mode 000 or 001, it can only be
switched into mode 000 or 001. The direction can only be changed in mode 001.
Once in an extended forward mode, the software should wait for the FIFO to be empty before switching back to the
mode 000 or 001. In this case, all control signals will be deasserted before the mode switch. In an ECP reverse mode,
the software waits for all the data to be read from the FIFO before changing back to the mode 000 or 001. Since the
automatic hardware ECP reverse handshake only cares about the state of the FIFO, it may have acquired extra data
which will be discarded. It may, if fact, be in the middle of a transfer when the mode is changed back to 000 or 001.
In this case, the port will desert AutoFd independent of the state of the transfer. The design shall not cause glitches
on the handshake signals if the software meets the constraints above.