GM82C803CN Datasheet, PDF (8/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

GM82C803CN
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PIN NO.
94
PIN
NAME
ADRX
IRQ_B
BUFFER
TYPE
Out
Out
DESCRIPTION
Address x pin. Active low address decode out; used to decode a 1,
8, or 16 byte address block. (An external pull-up is required).
Refer to Configuration Registers (index=D6,D7) for more
information. This pin has a 30 uA internal pull-up.
The interrupt request from a logical device or IRQIN may be
output on IRQ_B. Refer to the configuration registers for more
information.
98
VI/ O
(If EPP or ECP Mode is enabled, this output is pulsed low, then
released to allow sharing of interrupts.)
I/O Power pin. I/O Interface Supply Pin (5V).
15,72 Vcc
Positive Supply Voltage.
6,47,
67,95
GND
Ground Supply.
Note : When IDE and IRQ_H, IRRX2, IRTX2 are not selected, 3 pull-ups are active
on the Pin 24, Pin 25, and Pin 26
Note : IDE does not decode for 377, 3F7
Note : RI and the Serial interrupt is always active if system power is applied to the chip.