GM82C803CN Datasheet, PDF (72/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

GM82C803CN
5-3.3 Transmitter
System
tHR
tIR
tIRS
tSI
Parameter
Delay from IOW(WR THR) to Reset Interrupt
Delay from IOR (RD IIR) to Reset
Interrupt (THRE)
Delay from Initial INTR Reset to
Transmit Start
Delay from Initial Write to Interrupt
User Spec
Min
Max
175
250
8
24
16
32
tSTI Delay from Start to Interrupt (THRE)
8
tSXA Delay from Start to TXRDY active
8
tWXI Delay from Write to TXRDY inactive
195
Units
ns
ns
BAUDOUT
Cycles
BAUDOUT
Cycles
BAUDOUT
Cycles
BAUDOUT
Cycles
ns
Transmitter Timing
SERIAL
OUT(SOUT)
INTERRUPT
(THRE)
IOW
(WR THR)
IOR
(RD IIR)
Start
tIRS
tHR
tSI
DATA(5~8)
Parity STOP(1~2) Start
tSTI
tHR
tIR