GM82C803CN Datasheet, PDF (16/84 Pages) List of Unclassifed Manufacturers – 2.88 MB FDC/ Dual UARTs with FIFO/PIO(EPP/ ECP)/ IDE Interface/ S-IR/ PnP

3.1.22 General purpose address Decode Register (GDR)
Index = D7
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
GM82C803CN
3.1.23 DRVDEN Selection Register
Index = D8
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
FDD 0
FDD 1
FDD 2
FDD 3
FDD 3
Bit 7 Bit 6
DT1 DT0
FDD 2
Bit 5 Bit 4
DT1 DT0
FDD 1
Bit 3 Bit 2
DT1 DT0
FDD 0
Bit 1 Bit 0
DT1 DT0
DTx : Drive Type Select
DT1 DT0
0
0
0
1
1
0
1
1
DRVDEN 0 (Note)
DENSEL
DRATE 1
DENSEL
DRATE 0
DRVDEN 1 (Note)
DRATE 0
DRATE 0
DRATE 0
DRATE 1
Note : DENSEL, DRATE 1 and DRATE 0 map to two output pins DRVDEN0 and DRVDEN1.