CC2510FX Datasheet, PDF (68/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
Table 41: Peripheral I/O Pin Mapping
Periphery /
Function
P0
P1
7¹ 6¹ 5 4 3 2 1 0 7 6 5 4 3
ADC
A7 A6 A5 A4 A3 A2 A1 A0
USART0 Alt 1
C SS M0 MI
SPI Alt. 2
MO MI C
USART0 Alt. 1
TX RX
UART Alt. 2
TX RX
USART1 Alt.1
MI M0 C SS
SPI Alt. 2
MI M0 C SS
USART1 Alt. 1
RX TX
UART Alt. 2
RX TX
TIMER1 Alt.1
2
1
0
Alt. 2
TIMER3 Alt.1
1
0
Alt. 2
10
TIMER4 Alt.1
Alt. 2
I2S Alt. 1
CK WS RX TX
Alt. 2
32.768kHz
XOSC
DEBUG
P2
2 1043 21 0
SS
0 12
10
1
0
CK WS RX TX
Q2 Q1
DD
CD
1 _{This pin is only found on CC2510Fx ,it does not exist on CC2511Fx.}
13.1.4.1 USART0
• SS : SSN
The SFR register bit PERCFG.U0CFG selects
whether to use alternative 1 or alternative 2
locations. Note that if both USARTs are used,
they must be on different ports, i.e. one on P0
and one on P1. This applies both in UART and
SPI mode.
In Table 41, the USART0 signals are shown as
follows:
UART:
• RX : RXDATA
• TX : TXDATA
SPI:
• MI : MISO
P2DIR.PRIP0 selects the order of
precedence when assigning several
peripherals to port 0, i.e. the situation when
several peripherals are assigned to the same
pin locations. When set to 00, USART0 has
precedence. Note that if UART mode is
selected, USART1 or timer 1 will have
precedence to use ports P0_4 and P0_5.
P2SEL.PRI3P1 and P2SEL.PRI0P1 select
the order of precedence when assigning
several peripherals to port 1. USART0 has
precedence when both are set to 0. Note that if
UART mode is selected, timer 1 or timer 3 will
have precedence to use ports P1_2 and P1_3.
• MO : MOSI
• C : SCK
13.1.4.2 USART1
The SFR register bit PERCFG.U1CFG selects
whether to use alternative 1 or alternative 2
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 68 of 252