CC2510FX Datasheet, PDF (170/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
The USBINDEX register must have the
value of the endpoint number before the
Indexed Endpoint Registers are accessed.
13.15.6.1 FIFO Management
Each endpoint has a number of FIFO
memory bytes available for incoming and
outgoing data packets. Table 50 shows
the FIFO size for endpoints 1 – 5. It is the
firmware that is responsible for setting the
USBMAXI and USBMAXO registers correctly
for each endpoint so that no data
potentially gets overwritten.
When both the IN and OUT endpoint of an
endpoint number do not use double
buffering, the sum of USBMAXI and
USBMAXO must not exceed the FIFO size
for the endpoint. Figure 36 a) shows how
the IN and OUT FIFO memory for an
endpoint is organized with single buffering.
The IN FIFO grows down from the top of
the endpoint memory region while the
OUT FIFO grows up from the bottom of
the endpoint memory region.
When the IN or OUT endpoint of an
endpoint number use double buffering, the
sum of USBMAXI and USBMAXO must not
exceed half the FIFO size for the endpoint.
Figure 36 b) illustrates the IN and OUT
FIFO memory for an endpoint that uses
double buffering. Notice that the second
OUT buffer starts from the middle of the
memory region and grows upwards. The
second IN buffer also starts from the
middle of the memory region but grows
downwards.
To configure an endpoint as IN only, set
USBMAXO to 0 and to configure an
endpoint as OUT only, set USBMAXI to 0.
The USBMAXO and USBMAXI registers
should be 0 for unused endpoints.
EP Number
1
2
3
4
5
FIFO Size (in bytes)
32
64
128
256
512
Table 50 FIFO Sizes for EP 1 – 5
Figure 36: IN/OUT FIFOs, a) Double buffering b) Single buffering
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 170 of
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