CC2510FX Datasheet, PDF (176/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
XDATA
Address Register Description
0xDE20
0xDE22
0xDE24
0xDE26
0xDE28
0xDE2A
USBF0
USBF1
USBF2
USBF3
USBF4
USBF5
Endpoint 0 FIFO
Endpoint 1 FIFO
Endpoint 2 FIFO
Endpoint 3 FIFO
Endpoint 4 FIFO
Endpoint 5 FIFO
Table 53 Overview of Endpoint FIFO Registers
Bit Field Name
7 UPDATE
6:0 USBADDR[6:0]
0xDE00: USBADDR – Function Address
Reset
R/W Description
0
0x00
R0 This bit is set when the USBADDR register is written
and cleared when the address becomes effective.
R/W Function address.
Bit Field Name
7 ISO_WAIT_SOF
6:4 -
3 RST
2 RESUME
1 SUSPEND
0 SUSPEND_EN
0xDE01: USBPOW – Power/Control Register
Reset
R/W Description
0
R/W When this bit is set the USB Controller will only send
zero length data packets from the time INPKTRDY is
set and until the first SOF token has been received.
This only applies to isochronous endpoints.
000
R0 Unused
0
R During reset signaling, this bit is set.
0
R/W Drive resume signaling for remote wakeup.
According to the USB Specification the duration of
driving resume must be at least 1 ms and no more
than 15 ms. It is recommended to keep this bit set for
approximately 10 ms. This bit must not be set until
the USB Controller has been in suspend mode for at
least 2 ms.
0
R Suspend Mode entered. This bit will only be used
when SUSPEND_EN is set. Reading the USBCIF
register or setting RESUME will clear this bit.
0
R/W Suspend Detection Enable. When this bit is set, the
USBCIF.SUSPEND will be set when the USB bus
has been idle for 3 ms. An interrupt will also be
generated, if USBCIE.SUSPEND is set.
0xDE02: USBIIF – IN Endpoints and EP0 Interrupt Flags
Bit Field Name
Reset
R/W Description
7:6 -
5 INEP5IF
00
R0 Unused
0
R Interrupt flag for IN endpoint 5
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 176 of
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