CC2510FX Datasheet, PDF (29/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU

CC2510Fx / CC2511Fx
firmware hangs. When enabled, the watchdog
timer must be cleared periodically, otherwise it
will reset the device when it times out. See
section 13.12 for details.
Timer 1 is a 16-bit timer with
timer/counter/PWM functionality. It has a
programmable prescaler, a 16-bit period value
and three individually programmable
counter/capture channels each with a 16-bit
compare value. Each of the counter/capture
channels can be used as PWM outputs or to
capture the timing of edges on input signals. A
second order Sigma-Delta noise shaper mode
is also supported for audio applications. See
section 13.3 for details.
Timer 2 (MAC timer) is specially designed to
support time-slotted protocols in software. The
timer has a configurable timer period and 18-
bit tunable prescaler range. See section 13.4
for details.
Timers 3 and 4 are 8-bit timers with
timer/counter/PWM functionality. They have a
programmable prescaler, an 8-bit period value
and one programmable counter/capture
channel with an 8-bit compare value. Each of
the counter/capture channels can be used as
PWM outputs or to capture the timing of edges
on input signals. See section Error!
Reference source not found. for details.
USART 0 and 1 are each configurable as
either an SPI master/slave or a UART. They
provide double buffering on both RX and TX to
support
high-throughput
full-duplex
applications. Each has its own high-precision
baud-rate generator thus leaving the ordinary
timers free for other uses. See section 13.13
for details.
The AES encryption/decryption core allows
the user to encrypt and decrypt data using the
AES algorithm with 128-bit keys. See section
13.9 for details.
The ADC supports 8 to 14 bits of resolution in
a 30 kHz to 4 kHz bandwidth respectively. DC
and audio conversion with up to eight input
channels (Port 0) is possible. The inputs can
be selected as single ended or differential.
The reference voltage can be internal, AVDD,
or a single ended or differential external signal.
The ADC also has a temperature sensor input
channel. The ADC can automate the process
of periodic sampling or conversion over a
sequence of channels. See Section 13.7 for
details.
The USB allows the CC2511Fx to implement a
Full-Speed USB 2.0 compatible device. The
USB has a dedicated 1 KB SRAM that is used
for the endpoint FIFOs. 5 endpoints are
available in addition to control endpoint 0.
Each of these endpoints must be configured
as Bulk/Interrupt or Isochronous and can be
used as IN, OUT or IN/OUT. Double buffering
of packets is also supported for endpoints 1-5.
The maximum FIFO memory available for
each endpoint is as follows: 32 bytes for
endpoint 0, 32 bytes for endpoint 1, 64 bytes
for endpoint 2, 128 bytes for endpoint 3, 256
bytes for endpoint 4 and 512 bytes for
endpoint 5. When an endpoint is used as
IN/OUT the FIFO memory available for the
endpoint can be distributed between IN and
OUT depending on the demands of the
application. The USB does not exist on the
CC2510Fx. See section 13.15 for details.
The I2S can be used to send/receive audio
samples to/from an external sound processor
or DAC and may operate at full or half duplex.
Samples of up to 16-bits resolution can be
used although the I2S can be configured to
send more low order bits if necessary to be
compliant with the resolution of the receiver.
(up to 32 bit) The maximum bit-rate supported
is 3.5 Mbps. The I2S can be configured as a
master or slave device and supports both
mono and stereo. Automatic µ-Law expansion
and compression can also be configured. See
section 13.14 on page 158 for details.
9.2 Radio
CC2510Fx/CC2511Fx features an RF transceiver
based on the industry-leading CC2500,
requiring very few external components. See
Section 15 for details.
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 29 of 252