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CC2510FX Datasheet, PDF (189/253 Pages) List of Unclassifed Manufacturers – True System-on-Chip with Low Power RF Transceiver and 8051 MCU
CC2510Fx / CC2511Fx
FCTL (0xAE) – Flash Control
Bit Name
7 BUSY
6 SWBSY
Reset R/W
0
R
0
R
5-
4 CONTRD
0
R/W
R/W 0
3:2
1 WRITE
0 ERASE
0
R/W
0
R0/W
0
R0/W
Description
Indicates that write or erase is in operation
Indicates that single write is busy; avoid writing to FWDATA
register while this is true
Not used.
Continuous read enable mode
0 Avoid wasting power; turn on read enables to flash only
when needed
1 Enable continuous read enables to flash when read is to
be done. Reduces internal switching of read enables, but
greatly increases power consumption.
Not used.
Page Write. Start writing page given by FADDRH:FADDRL. If
ERASE is set to 1, a page erase is performed before the write.
Page Erase. Erase page that is given by FADDRH:FADDRL
FWDATA (0xAF) – Flash Write Data
Bit Name
Reset R/W
7:0 FWDATA[7:0] 0x00 R/W
Description
Flash write data. Data written to FWDATA is written to flash when
FCTL.WRITE is set to 1.
FADDRH (0xAD) – Flash Address High Byte
Bit Name
Reset R/W
7:6 -
00
R/W
5:0 FADDRH[6:0] 0x00 R/W
Description
Not used
High byte of flash address
Bits 5:1 will select page to access, while bit 0 is MSB of row
access.
FADDRL (0xAC) – Flash Address Low Byte
Bit Name
Reset R/W
7:0 FADDRL[7:0] 0x00 R/W
Description
Low byte of flash address
Bit 0 of FADDRH and bits 7:6 will select which row to write to,
while bits 5:0 will select which location to write to.
FWT (0xAB) – Flash Write Timing
Bit Name
7:6 -
5:0 FWT[5:0]
Reset R/W
00
R/W
0x25 R/W
Description
Not used
Flash Write Timing. Controls flash timing generator.
CC2510Fx/CC2511Fx PRELIMINARY Data Sheet (Rev. 1.2) SWRS055A Page 189 of
252