DS80C390_00 Datasheet, PDF (92/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DTUP
Bit 0
DS80C390 High-Speed Microcontroller User’s Guide Supplement
= 0 and DTUP = 1 will force the CAN module to ignore the respective message
center when the CAN is processing the incoming data.
ROW is cleared by the CAN module when the microcontroller clears the
DTUP bit associated with the same message center. INTRQ is automatically
set when the ERI=1 and message center 1 successfully receives and stores a
message.
ROW will reflect the actual message center relationships for message centers
1 to 14. Message center 15 utilizes a special shadow message buffer, and the
ROW bit for that message center indicates an overwrite of the buffer as
opposed to the actual message center 15. The ROW bit for message center 15
is cleared once the shadow buffer is loaded into the message center 15, and
the shadow buffer is cleared to allow a new message to be loaded. The
shadow buffer is automatically loaded into message center 15 when the
microcontroller clears the DTUP and EXTRQ bits in message center 15.
Transmit Inhibit: (T/ R = 1, TIH is unrestricted Read/Write)
The TIH allows the microcontroller to disable the transmission of the
message when the data contents of the message are being updated. TIH = 1
directs the CAN 1 controller not to transmit the associated message. TIH = 0
enables the CAN 1 controller to transmit the message. If TIH = 1 when a
remote frame request is received by the message center, EXTRQ will be set
to a 1. Following the Remote Frame Request and after the microcontroller
has established the proper data to be sent, the microcontroller will clear the
TIH bit to a 0, which will allow the CAN module to send the data requested
by the previous Remote Frame Request. Note that the TIH bit associated with
Message Center 15 is ignored because it is a receive only message center.
CAN 1 Message Center 1 Data Updated. This bit indicates that new data
has been loaded into the data portion of the message center. The exact
function of the DTUP bit is dependent on whether the message center is
configured in a receive (T/ R = 0) or transmit (T/ R = 1) mode. Some
functions are also dependent on the state of the WTOE bit. The DTUP bit is
only cleared by a software write to the bit, a system reset, or the setting of the
CRST bit.
T/ R =0 (receive)
In this mode (T/ R = 0) the DTUP bit is set when new data has been successfully
received and is ready to be read by the microcontroller. The exact meaning of the
DTUP bit during a message center read is determined by the WTOE bit in the
CAN 1 Control Register.
If WTOE = 1 (message center overwrite enabled), DTUP should be
polled before and after reading the message center to ascertain if an
overwrite of the data occurred during the read. For example, software
should clear DTUP before reading the message center and then again
after the message center read. If DTUP has been set, then a new
message was received and software should read the message center
again to read the new data. If DTUP remained cleared, no additional
data was received and the data is complete.
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