DS80C390_00 Datasheet, PDF (126/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DS80C390 High-Speed Microcontroller User’s Guide Supplement
CAN Extended Global Mask Register 0 (CnEGM0)
MOVX
Address¹
7
6
5
4
3
2
1
0
xxxx08h MASK28 MASK27 MASK26 MASK25 MASK24 MASK23 MASK22 MASK21
CAN Extended Global Mask Register 1 (CnEGM1)
MOVX
Address¹
7
6
5
4
3
2
1
0
xxxx09h MASK20 MASK19 MASK18 MASK17 MASK16 MASK15 MASK14 MASK13
CAN Extended Global Mask Register 2 (CnEGM2)
MOVX
Address¹
7
6
5
4
3
xxxx0Ah MASK12 MASK11 MASK10 MASK9 MASK8
2
MASK7
1
MASK6
0
MASK5
CAN Extended Global Mask Register 3 (CnEGM3)
MOVX
Address¹
7
6
5
4
3
2
1
0
xxxx0Bh MASK4 MASK3 MASK2 MASK1 MASK0
0
0
0
CAN Extended Global Mask Registers 0-3. These registers function as the
mask when performing the Extended Global Identification test (EX/ ST =1) for
Message Centers 1-14. When EX/ ST =0 the contents of this register will be
ignored. These registers can only be modified during a software initialization
(SWINT=1).
When EX/ ST =1, the 29-bits of the message ID will be compared against the 29-
bits of the CAN Message Center y Arbitration Registers, using the 29 bits of the
CAN Extended Global Mask Registers as a mask. Any bit in the Extended Global
Mask Registers set to 0 will ignore the state of the corresponding bit in the
incoming message ID field when performing the test. Any bit in the Extended
Global Mask Registers set to 1 will force the state of the corresponding bit in the
incoming message ID field and CAN message center arbitration Registers 0-3 to
match before considering the incoming message a match.
The three least significant bits in the CnEGM3 are not used, and will not perform
any comparison of these bit locations. A read of these bits will always return 0,
and writes to these bits will be ignored.
Programming all Mask registers to 00h effectively disables the Global ID test for
that message, accepting all messages. As such the Global mask registers act as a
don’t care following a system Reset.
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