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DS80C390_00 Datasheet, PDF (91/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement
MTRQ
Bit 2
ROW/TIH
Bit 1
DS80C390 High-Speed Microcontroller User’s Guide Supplement
completed the service request. Following the completion of a requested
transmission by a message center programmed for transmission (T/ R = 1),
the EXTRQ bit will be cleared by the CAN 1 controller. A remote request is
only answered by a message center programmed for transmission (T/ R = 1)
when DTUP = 1 and TIH = 0, i.e. when new data was loaded and is not being
currently modified by the micro. Note that a message center programmed for
a receive mode (T/ R = 0) will also detect a remote frame request and will set
the EXTRQ bit in a similar manner, but will not automatically transmit a data
frame and as such will not automatically clear the EXTRQ bit.
CAN 1 Message Center 1 Microcontroller Transmit Request. When set,
this bit indicates that the message center is requesting that a message be
transmitted. The bit is cleared when the transmission is complete, allowing
this bit to be used to both initiate and monitor the progress of the
transmission. The bit can be set via software or the CAN module, depending
on the state of the Transmit/Receive bit in the CAN 1 Message 1 Format
Register (located in MOVX space). This bit is cleared when the CRST bit is
set, the CAN module experiences a system reset, or the conditions described
below. Note that the MTRQ bit located in Message Center 15 is ignored by
the CAN module, since the Message Center 15 is a receive only message
center.
T/ R =0 (receive)
When software sets this bit, a remote frame request previously loaded into the
message center will be transmitted. The CAN 1 Module will clear this bit
following the successful transmission of the frame request message.
T/ R =1 (transmit)
When software sets this bit, a data frame previously loaded into the message
center will be transmitted. When T/ R = 1, the MTRQ bit will also be set by
the CAN 1 controller at the same time that the EXTRQ bit is set by a message
request from an external node.
CAN 1 Message Center 1 Receive Overwrite/Transmit Inhibit. The
Receive Overwrite (ROW) and Transmit Inhibit (TIH) bits share the same bit
location. When T/ R = 0 the bit has the ROW function, serving as a flag that
an overwrite of incoming data may have occurred. When T/ R = 1 the bit has
the Transmit Inhibit function, allowing software to disable the transmission
of a message while the data contents are being updated.
Receive Overwrite: (T/ R = 0, ROW is Read Only)
The CAN 1 controller automatically sets this bit 0 if a new message is received
and stored while the DTUP bit was still set. When set, ROW indicates that the
previous message was potentially lost and may not have been read, since the
microcontroller had not cleared the DTUP bit prior to the new load. When ROW
= 0, no new message has been received and stored while DTUP was set to ‘1’
since this bit was last cleared. Note that the ROW bit will not be set when the
WTOE bit is cleared to a 0, since all overwrites are disabled. This is due to the
fact that even if the incoming message matches the respective message center that
as long as DTUP = 1 in the respective message center, the combination of WTOE
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