DS80C390_00 Datasheet, PDF (154/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DS80C390 High-Speed Microcontroller User’s Guide Supplement
MB
MB.7-0
Multiplier B Register. This register is used as both a source and result register for
various arithmetic accelerator functions.
MC
MC.7-0
Multiplier C Register. This register serves as the 40-bit accumulator of the
arithmetic accelerator.
The following procedures illustrate how to use the arithmetic accelerator. The MA and MB registers must
be loaded and read in the order shown for proper operation, although accesses to any other registers can
be performed between access to the MA or MB registers. An access to the MA, MB, or MC registers out
of sequence will corrupt the operation, requiring the software to clear the MST bit to restart the math
accelerator state machine.
Divide (32/16 or 16/16)
The divide operation utilizes a 32 or 16 bit dividend and a 16-bit divisor. The dividend is loaded into MA
(four bytes in the case of a 32-bit dividend, 2 bytes for a 16-bit dividend) and the 16-bit divisor is loaded
into MB. The quotient is stored in MA and the remainder in MB. The optional test of the MOF bit can be
performed to detect a divide by zero operation if software has not previously checked for a non-zero
divisor.
1. Load MA with dividend LSB.
2. Load MA with dividend LSB+1*
3. Load MA with dividend LSB+2*
4. Load MA with dividend MSB.
5. Load MB with divisor LSB.
6. Load MB with divisor MSB.
7. Poll the MST bit until cleared (9 machine cycles).
8. Check MOF bit (MCNT1.6) to see if divide by zero occurred. (optional)
9. Read MA to retrieve the quotient MSB.
10. Read MA to retrieve the quotient LSB+2.
11. Read MA to retrieve the quotient LSB+1.
12. Read MA to retrieve the quotient LSB.
13. Read MB to retrieve the remainder MSB.
14. Read MB to retrieve the remainder LSB.
*Steps 2 and 3 not performed for 16 bit dividend.
Multiply (16x16)
This function multiplies two 16-bit values in MA and MB and places the 32-bit product into MA. If the
product exceeds FFFFh then the Multiply Overflow Flag (MOF) will be set
1. Load MB with multiplier LSB.
2. Load MB with multiplier MSB.
3. Load MA with multiplicand LSB.
4. Load MA with multiplicand MSB.
5. Poll the MST bit until cleared (6 machine cycles).
6. Read MA for product MSB.
7. Read MA for product LSB+2.
8. Read MA for product LSB+1.
9. Read MA for product LSB.
10. Check MOF bit (MCNT1.6) to see if product exceeded FFFFh. (optional)
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