DS80C390_00 Datasheet, PDF (147/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DS80C390 High-Speed Microcontroller User’s Guide Supplement
remote frame request (EXTRQ = 1), successfully received messages are stored in the shadow message
center, overwriting existing data. If the shadow message center contained previously unread data at the
time of the overwrite, the message center 15 ROW bit will be set. If the shadow message center was
empty at the time of the overwrite, then the incoming message will overwrite the previous message in the
shadow buffer and ROW will be set to a 1. Note that the message center 15 ROW bit reflects only an
overwrite of the shadow message center, not the message center registers as with message centers 1-14.
When WTOE = 0 and there is unread data (DTUP =1) or a pending remote frame request (EXTRQ = 1)
in message center 15 and there is already a message stored in the shadow buffer, incoming messages will
not be stored in either the message center or shadow buffers.
Bus Off / Bus Off Recovery and Error Counter Operation
Each CAN module contains two SFR registers that allow the software to monitor and modify (under
controlled conditions) the error counts associated with the transmit and receive error counters in each
CAN module. These registers can be read at any time. Writing the CAN Transmit Error Counter registers
updates both the Transmit Error Counter registers and the Receive Error Counter registers with the same
value. Details are given in the SFR description of these registers. These counters are incremented or
decremented according to CAN specification version 2.0B, summarized in the rules below. The error
counters are initialized by a CRST = 1 or a system reset to 00h. The error counters remain unchanged
when the CAN module enters and exits from a low power mode via the SIESTA or PDE bit.
Changes to the error counters are performed according to the following rules. This level of detail is not
necessary for the average CAN user, and full information is provided in the CAN 2.0B specification.
More than one rule may apply to a given message.
Condition
Error detected by receiver, unless the detected error
was a bit error during the sending of an active error
flag or an overload flag.
Receiver detects a dominant bit as the first bit after
sending an error flag.
Transmitter sends an error flag.
Note, however, that the transmit error count will not
change if:
1) The transmitter is error passive and detects an
acknowledgement error because of not detecting a
dominant acknowledge and does not detect a
dominant bit while sending its passive error flag.
2) Or, if the transmitter sends an error flag because a
stuff error occurred during arbitration, and has
been sent as recessive but monitored as dominant.
Transmitter detects a bit error while sending an active
error flag or an overload flag.
Receiver detects a bit error while sending an active
error flag or an overload flag.
Effect on error counters
Receive Error Counter incremented by 1.
Receive Error Counter incremented by 8.
Transmit Error Counter incremented by 8.
Transmit Error Counter incremented by 8.
Receive Error Counter incremented by 8.
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