DS80C390_00 Datasheet, PDF (87/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DS80C390 High-Speed Microcontroller User’s Guide Supplement
INTRQ bit in the respective CAN Message Control Register is set.
CAN 1 Transmit Error Register (C1TE)
7
6
5
4
3
2
1
0
SFR E6h
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R=Unrestricted Read, *= Write only when SWINT=1 and BUSOFF=0, -n=Value after Reset
C1TE.7-0
Bits 7-0
CAN 1 Transmit Error Register. This register indicates the number of
accumulated CAN 1 transmit errors. The CAN 1 module responds in different
ways to varying number of errors as shown below.
This register can only be modified via software when SWINT=1 and
BUSOFF=0. All software writes to this register simultaneously load the same
value into the CAN 1 Transmit Error Register and the CAN 1 Receive Error
Register. Writing 00h to this register will also clear the CAN 1 Error Count
Exceeded bit, CECE (C1S.6). This register is cleared following all hardware
Resets and software resets enabled via the CRST bit in the CAN 1 Control
Register.
C1TE Value CAN 1 State
Value < 96 Error active mode, CAN 1 Bus on (BUSOFF=0)
128 > Value ≥ 96 Error active mode, CAN 1 Bus on (BUSOFF=0), warning
level
255 ≥ Value ≥ 128 Error passive mode, CAN 1 Bus on (BUSOFF=0)
Value > 255 CAN 1 Bus off (BUSOFF=1)
CAN 1 Receive Error Register (C1RE)
7
6
5
4
3
2
1
0
SFR E7h
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R*-0
R=Unrestricted Read, *= Write only via C1TE register, -n=Value after Reset
C1RE.7-0
Bits 7-0
CAN 1 Receive Error Register. This register indicates the number of
accumulated CAN 1 receive errors. All writes to the C1TE register are
simultaneously loaded into this register. This register is cleared following all
hardware Resets and software resets enabled via the CRST bit in the CAN 1
Control Register.
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