DS80C390_00 Datasheet, PDF (35/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

P5CNT.2-
P4CNT.0
DS80C390 High-Speed Microcontroller User’s Guide Supplement
Port Pin P5.7-P5.4 Configuration Control Bits
These bits, in conjunction with the P4CNT register, control which Port 5 pins (if
any) are used for PCEx decoding as shown in the table below. The memory range
addressable by each PCEx signal is a function of the total number of address lines
(A19-A16) established by the P4CNT register. Note that the chip enable range
when using A0-A15 is 32 KB instead of the expected 64 KB. This is to allow the
use of more common 32 KB memory devices rather than 64 KB devices.
Port 5 Pin Function
P5CNT.2-0
P5.7
P5.6
P5.5
P4.4
000
I/O
I/O
I/O
I/O
100
I/O
I/O
I/O
PCE0
101
I/O
I/O
PCE1
PCE0
110
I/O
PCE2
PCE1
PCE0
111
PCE3
PCE2
PCE1
PCE0
The memory range addressable by each PCEx signal is a function of the total
number of address lines (A19-A16) established by the P4CNT register. Note that
the chip enable range when using A0-A15 is 32 KB instead of the expected 64
KB. This is to allow the use of more common 32 KB memory devices rather than
64 KB devices.
Port 4 Pin Function
P4CNT.5-3
PCE0
PCE1
PCE2
PCE3
000
0 - 32KB
32 - 64KB
64 - 96KB 96 - 128KB
100
0 - 128KB 128 - 256KB 256 - 384KB 384 - 512KB
101
0 - 256KB 256 - 512KB 512 - 768KB 768KB - 1MB
110
0 - 512KB
512 - 1MB
1 - 1.5MB
1.5 - 2MB
111
0 - 1MB
1 - 2M
2 - 3MB
3 - 4MB
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