DS80C390_00 Datasheet, PDF (155/155 Pages) Dallas Semiconductor – High-Speed Microcontroller User’s Guide Supplement

DS80C390 High-Speed Microcontroller User’s Guide Supplement
Shift right/left
The shift function rotates the 32 bits of the MA register as directed by the control bits of the MCNT0
register. MA will contain the shifted results following the operation. Note that the multiplier register shift
bits (MCNT.4-0) must be set to a nonzero value or the Normalize function will be performed instead of
the desired shift operation.
1. Load MA with data LSB.
2. Load MA with data LSB+1.
3. Load MA with data LSB+2.
4. Load MA with data MSB.
5. Configure MCNT0 register as required.
6. Poll the MST bit until cleared. (9 machine cycles)
7. Read MA for result MSB.
8. Read MA for result LSB+2.
9. Read MA for result LSB+1.
10. Read MA for result LSB.
Normalize
The normalize function is used to convert four byte unsigned binary integers into floating point format by
removing all leading zeros by shift left operations. Following the operation MA will contain the
normalized value (mantissa) and the MAS4-0 bits will contain the number of shifts performed
(characteristic).
1. Load MA with data LSB.
2. Load MA with data LSB+1.
3. Load MA with data LSB+2.
4. Load MA with data MSB.
5. Write 00000b to the MAS4-0 bits in the MCNT0 register.
6. Poll the MST bit until cleared. (9 machine cycles)
7. Read MA for mantissa MSB.
8. Read MA for mantissa LSB+2.
9. Read MA for mantissa LSB+1.
10. Read MA for mantissa LSB.
11. Read MAS4-0 to determine the number of shifts performed.
40-BIT ACCUMULATOR
The accelerator also incorporates an automatic accumulator function, permitting the implementation of
multiply-and-accumulate and divide-and-accumulate functions without any additional delay. Each time
the accelerator is used for a multiply or divide operation, the result is transparently added to a 40-bit
accumulator. This can greatly increase speed of DSP and other high-level math operations.
The accumulator can be accessed any time the Multiply/Accumulate Status Flag (MCNT1;D2h) is
cleared. The accumulator is initialized by performing five writes to the Multiplier C Register (MC;D5h),
LSB first. The 40-bit accumulator can be read by performing five reads of the Multiplier C Register,
MSB first.
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