EP3SE80F780I4N Datasheet, PDF (32/341 Pages) Altera Corporation – Chapter Revision Dates

1–22
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
Switching Characteristics
Table 1–25. True and Emulated LVDS Specifications for Stratix III Devices (Note 1), (2) (Part 2 of 3)
C2
Symbol
Conditions
C3, I3
C4, I4
C4L, I4L
LVDS_E_1R -f_HSDR
(data rate)
t_{x Jitter} (5)
t_DUTY
t_RISE & t_FALL
t_RISE & t_FALL
t_RISE & t_FALL
TCCS
TCCS
Receiver
f_HSDRDPA (data rate)
f_HSDR (data rate)
DPA
DPA run length
Soft CDR mode
Soft-CDR PPM
tolerance
SERDES factor
J = 4 to 10
Total Jitter for
Data Rate,
600 Mbps –
1.6 Gbps
Total Jitter for
Data Rate,
< 600 Mbps
T_X output duty
cycle for both
True and
Emulated
Differential I/O
True Differential
I/O Standards
Emulated
Differential I/O
Standards with
Three External
Output Resistor
Network
Emulated
Differential I/O
Standards with
One External
Output Resistor
Network
True Differential
I/O Standards
Emulated
Differential I/O
Standards
SERDES factor
J = 3 to 10
SERDES factor
J = 3 to 10
SERDES factor
J = 2, Uses DDR
Registers
SERDES factor
J = 1, Uses an
SDR Register
—
—
(4) —
——
——
45 50
——
——
——
——
——
150 —
(4) —
(4) —
(4) —
——
——
311
160
0.1
55
160
310
460
100
250
1600
(6)
(6)
(6)
10000
300
(4) —
——
——
45 50
——
——
——
——
——
150 —
(4) —
(4) —
(4) —
——
——
200
160
0.1
55
200
310
500
100
250
1250
(6)
(6)
(6)
10000
300
(4) —
——
——
45 50
——
——
——
——
——
150 —
(4) —
(4) —
(4) —
——
——
200
160
0.1
55
200
350
500
100
250
1250
(6)
(6)
(6)
10000
300
(4) —
——
——
45 50
——
——
——
——
——
150 —
(4) —
(4) —
(4) —
——
——
200 Mbps
160
ps
0.1
UI
55
%
200
ps
350
ps
500
ps
100
ps
250
ps
1250 Mbps
(6) Mbps
(6) Mbps
(6) Mbps
10000 UI
300 ± PPM
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation