EP3SE80F780I4N Datasheet, PDF (254/341 Pages) Altera Corporation – Chapter Revision Dates

1–244
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–114. EP3SE80 Row Pins Output Timing Parameters (Part 5 of 5)
I/O
Standard
4mA
1.2-V
HSTL
CLASS I ^6mA
8mA
3.0-V PCI —
3.0-V
PCI-X
—
Clock
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
GCLK t_co
GCLK
PLL
t_co
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.081
3.316 4.684 5.077 5.577 5.446 5.723 5.195 5.696 5.566 5.800 ns
1.260
1.434 1.844 1.931 2.129 2.150 2.191 2.031 2.233 2.252 2.179 ns
3.072
3.308 4.675 5.068 5.568 5.437 5.714 5.186 5.687 5.557 5.791 ns
1.251
1.426 1.835 1.922 2.120 2.141 2.182 2.022 2.224 2.243 2.170 ns
3.071
3.308 4.682 5.076 5.577 5.446 5.723 5.195 5.697 5.567 5.801 ns
1.250
1.426 1.842 1.930 2.129 2.150 2.191 2.031 2.234 2.253 2.180 ns
3.177
3.415 4.724 5.106 5.581 5.466 5.731 5.228 5.698 5.590 5.810 ns
1.333
1.510 1.860 1.936 2.152 2.143 2.217 2.038 2.252 2.248 2.208 ns
3.177
3.415 4.724 5.106 5.581 5.466 5.731 5.228 5.698 5.590 5.810 ns
1.333
1.510 1.860 1.936 2.152 2.143 2.217 2.038 2.252 2.248 2.208 ns
Table 1–115 through Table 1–118 list the maximum I/O timing parameters for
EP3SE80 devices for differential I/O standards.
Table 1–115 lists the EP3SE80 column pins input timing parameters for differential
I/O standards.
Table 1–115. EP3SE80 Column Pins Input Timing Parameters (Part 1 of 3)
I/O Standard
LVDS
MINI-LVDS
RSDS
DIFFERENTIAL
1.2-V HSTL
CLASS I
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Clock
Industrial Commercial
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
Units
t_su
GCLK
t_h
GCLK ^tsu
PLL _th
t_su
t_h
GCLK
t_su
GCLK ^th
PLL _tsu
t_h
t_su
GCLK
t_h
t_su
GCLK
t_h
GCLK ^tsu
PLL _th
-0.997
1.133
0.960
-0.691
-0.997
1.133
0.960
-0.691
-0.997
1.133
0.960
-0.691
-0.813
0.942
1.144
-0.882
-1.029
1.184
0.994
-0.701
-1.029
1.184
0.994
-0.701
-1.029
1.184
0.994
-0.701
-0.852
0.999
1.171
-0.886
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.181 -1.169 -1.324 -1.269 -1.645 -1.133 -1.542 -1.230 -1.683 ns
1.415 1.436 1.618 1.551 1.927 1.411 1.858 1.524 1.966 ns
1.879 2.224 2.401 2.288 2.194 2.277 2.567 2.345 2.245 ns
-1.428 -1.714 -1.834 -1.749 -1.648 -1.756 -1.968 -1.795 -1.697 ns
-1.258 -1.368 -1.483 -1.423 -1.794 -1.368 -1.482 -1.428 -1.837 ns
1.460 1.595 1.731 1.659 2.031 1.604 1.739 1.674 2.075 ns
1.802 2.025 2.242 2.134 2.045 2.042 2.260 2.147 2.091 ns
-1.383 -1.555 -1.721 -1.641 -1.544 -1.563 -1.729 -1.645 -1.588 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation