EP3SE80F780I4N Datasheet, PDF (192/341 Pages) Altera Corporation – Chapter Revision Dates

1–182
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–93. EP3SL340 Column Pins Output Timing Parameters (Part 3 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co 3.896
2mA
GCLK
PLL ^tco
4.460
3.896
4.460
5.772 6.014 6.599 6.451 6.880 6.014 6.599 6.451 6.880 ns
6.613 6.863 7.507 7.327 7.870 6.863 7.507 7.327 7.870 ns
GCLK t_co 3.715
4mA
GCLK
PLL ^tco
4.282
3.715
4.282
5.493 5.705 6.251 6.104 6.532 5.705 6.251 6.104 6.532 ns
6.336 6.556 7.177 6.998 7.539 6.556 7.177 6.998 7.539 ns
GCLK t_co 3.633
3.633 5.386 5.590 6.141 5.993 6.422 5.590 6.141 5.993 6.422 ns
6mA
GCLK
PLL ^tco
4.197
4.197 6.227 6.440 7.064 6.884 7.427 6.440 7.064 6.884 7.427 ns
1.8 V
GCLK t_co 3.613
3.613 5.327 5.537 6.075 5.927 6.356 5.537 6.075 5.927 6.356 ns
8mA
GCLK
PLL ^tco
4.177
4.177 6.169 6.386 6.987 6.807 7.350 6.386 6.987 6.807 7.350 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.550
4.114
3.550
4.114
5.266 5.462 5.994 5.846 6.275 5.462 5.994 5.846 6.275 ns
6.109 6.312 6.918 6.738 7.281 6.312 6.918 6.738 7.281 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.532
4.097
3.532
4.097
5.246 5.440 5.971 5.823 6.252 5.440 5.971 5.823 6.252 ns
6.088 6.291 6.885 6.705 7.248 6.291 6.885 6.705 7.248 ns
GCLK t_co 3.842
2mA
GCLK
PLL ^tco
4.406
3.842
4.406
5.700 5.947 6.537 6.389 6.818 5.947 6.537 6.389 6.818 ns
6.542 6.796 7.452 7.272 7.815 6.796 7.452 7.272 7.815 ns
GCLK t_co 3.630
4mA
GCLK
PLL ^tco
4.194
3.630
4.194
5.381 5.590 6.145 5.997 6.426 5.590 6.145 5.997 6.426 ns
6.223 6.439 7.066 6.886 7.429 6.439 7.066 6.886 7.429 ns
GCLK t_co 3.605
3.605 5.314 5.530 6.078 5.930 6.359 5.530 6.078 5.930 6.359 ns
6mA
GCLK
PLL ^tco
4.170
4.170 6.156 6.381 6.989 6.809 7.352 6.381 6.989 6.809 7.352 ns
1.5 V
GCLK t_co 3.594
3.594 5.297 5.505 6.058 5.910 6.339 5.505 6.058 5.910 6.339 ns
8mA
GCLK
PLL ^tco
4.158
4.158 6.140 6.356 6.972 6.792 7.335 6.356 6.972 6.792 7.335 ns
GCLK t_co
10mA _GCLK
PLL ^tco
3.539
4.103
3.539
4.103
5.259 5.455 5.988 5.840 6.269 5.455 5.988 5.840 6.269 ns
6.101 6.305 6.909 6.729 7.272 6.305 6.909 6.729 7.272 ns
GCLK t_co
12mA _GCLK
PLL ^tco
3.534
4.097
3.534
4.097
5.243 5.443 5.977 5.829 6.258 5.443 5.977 5.829 6.258 ns
6.084 6.292 6.888 6.708 7.251 6.292 6.888 6.708 7.251 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation