EP3SE80F780I4N Datasheet, PDF (135/341 Pages) Altera Corporation – Chapter Revision Dates

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–125
Table 1–73. EP3SL150 Column Pins Output Timing Parameters (Part 2 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
GCLK t_co 3.428
4mA
GCLK
PLL ^tco
3.901
3.445
3.847
4.772 5.132 5.632 5.480 5.815 5.132 5.632 5.480 5.815 ns
5.359 5.892 6.348 6.168 6.550 5.892 6.348 6.168 6.550 ns
3.3-V
LVCMOS
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
3.273
3.701
3.280
3.703
3.290
3.692
3.297
3.699
4.565 4.935 5.431 5.279 5.614 4.935 5.431 5.279 5.614 ns
5.152 5.600 6.147 5.967 6.349 5.600 6.147 5.967 6.349 ns
4.559 4.914 5.405 5.253 5.588 4.914 5.405 5.253 5.588 ns
5.146 5.579 6.121 5.941 6.323 5.579 6.121 5.941 6.323 ns
GCLK t_co
16mA _GCLK
PLL ^tco
3.264
3.687
3.281
3.683
4.537 4.888 5.376 5.224 5.559 4.888 5.376 5.224 5.559 ns
5.124 5.553 6.092 5.912 6.294 5.553 6.092 5.912 6.294 ns
GCLK t_co 3.386
4mA
GCLK
PLL ^tco
3.843
3.403
3.805
4.735 5.096 5.592 5.440 5.775 5.096 5.592 5.440 5.775 ns
5.322 5.831 6.308 6.128 6.510 5.831 6.308 6.128 6.510 ns
3.0-V
LVTTL
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
3.275
3.713
3.239
3.662
3.292
3.694
3.256
3.658
4.605 4.962 5.455 5.303 5.637 4.962 5.455 5.303 5.637 ns
5.192 5.659 6.170 5.991 6.371 5.659 6.170 5.991 6.371 ns
4.542 4.893 5.381 5.229 5.563 4.893 5.381 5.229 5.563 ns
5.129 5.560 6.096 5.917 6.298 5.560 6.096 5.917 6.298 ns
GCLK t_co
16mA _GCLK
PLL ^tco
3.221
3.644
3.238
3.640
4.513 4.865 5.352 5.200 5.535 4.865 5.352 5.200 5.535 ns
5.100 5.530 6.070 5.888 6.270 5.530 6.070 5.888 6.270 ns
GCLK t_co 3.300
4mA
GCLK
PLL ^tco
3.751
3.317
3.719
4.639 4.995 5.490 5.338 5.672 4.995 5.490 5.338 5.672 ns
5.226 5.712 6.205 6.026 6.406 5.712 6.205 6.026 6.406 ns
3.0-V
LVCMOS
GCLK t_co
8mA _GCLK
PLL ^tco
GCLK t_co
12mA _GCLK
PLL ^tco
3.221
3.644
3.216
3.639
3.238
3.640
3.233
3.635
4.515 4.866 5.355 5.203 5.537 4.866 5.355 5.203 5.537 ns
5.102 5.531 6.083 5.891 6.271 5.531 6.083 5.891 6.271 ns
4.508 4.859 5.346 5.194 5.529 4.859 5.346 5.194 5.529 ns
5.095 5.524 6.062 5.882 6.264 5.524 6.062 5.882 6.264 ns
GCLK t_co
16mA _GCLK
PLL ^tco
3.207
3.630
3.224
3.626
4.494 4.844 5.331 5.179 5.514 4.844 5.331 5.179 5.514 ns
5.081 5.509 6.057 5.867 6.249 5.509 6.057 5.867 6.249 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2