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EP3SE80F780I4N Datasheet, PDF (180/341 Pages) Altera Corporation – Chapter Revision Dates
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1–170
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–87. EP3SL200 Column Pins output Timing Parameters (Part 4 of 4)
I/O Standard
Clock
DIFFERENTIAL
2.5-V SSTL
CLASS I
DIFFERENTIAL
2.5-V SSTL
CLASS II
8mA
10mA
12mA
16mA
GCLK
GCLK
PLL
GCLK
GCLK
PLL
GCLK
GCLK
PLL
GCLK
GCLK
PLL
Fast Model
Industrial Commercial
C2
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL= VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL= VCCL=
1.1 V 0.9 V
Units
tco 3.484
3.762 5.558 5.770 6.334 6.170 6.577 5.915 6.479 6.170 6.577 ns
tco 3.482
3.760 5.556 5.768 6.332 6.168 6.575 5.913 6.476 6.168 6.575 ns
tco 3.486
3.762 5.548 5.758 6.320 6.156 6.563 5.902 6.463 6.156 6.563 ns
tco 3.486
3.763 5.556 5.768 6.332 6.168 6.575 5.913 6.476 6.168 6.575 ns
tco 3.502
3.780 5.572 5.783 6.346 6.182 6.589 5.928 6.489 6.182 6.589 ns
tco 3.502
3.780 5.572 5.783 6.346 6.182 6.589 5.928 6.489 6.182 6.589 ns
tco 3.492
3.770 5.562 5.773 6.336 6.172 6.579 5.918 6.480 6.172 6.579 ns
tco 3.485
3.762 5.548 5.758 6.320 6.156 6.563 5.902 6.463 6.156 6.563 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation
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