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EP3SE80F780I4N Datasheet, PDF (271/341 Pages) Altera Corporation – Chapter Revision Dates | |||
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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1â261
Table 1â123 lists the EP3SE110 column pins output timing parameters for
single-ended I/O standards.
Table 1â123. EP3SE110 Column Pins Output Timing Parameters (Part 1 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial Commercial
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL=
VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL=
VCCL=
1.1 V 0.9 V
UnitS
GCLK tco
4mA
GCLK
PLL
tco
3.489
3.868
3.489
3.881
4.830 5.213 5.686 5.551 5.863 5.213 5.686 5.551 5.863 ns
5.415 5.837 6.442 6.278 6.680 5.837 6.442 6.278 6.680 ns
3.3-V
LVTTL
GCLK tco
8mA
GCLK
PLL
tco
GCLK tco
12mA
GCLK
PLL
tco
3.422
3.801
3.336
3.715
3.422
3.814
3.336
3.728
4.721 5.102 5.573 5.438 5.750 5.102 5.573 5.438 5.750 ns
5.306 5.726 6.329 6.165 6.567 5.726 6.329 6.165 6.567 ns
4.617 5.003 5.481 5.346 5.658 5.003 5.481 5.346 5.658 ns
5.203 5.628 6.237 6.073 6.475 5.628 6.237 6.073 6.475 ns
GCLK tco
16mA
GCLK
PLL
tco
3.329
3.709
3.329
3.721
4.600 4.975 5.440 5.305 5.617 4.975 5.440 5.305 5.617 ns
5.186 5.600 6.196 6.032 6.434 5.600 6.196 6.032 6.434 ns
GCLK tco
4mA
GCLK
PLL
tco
3.495
3.874
3.495
3.887
4.834 5.218 5.693 5.558 5.870 5.218 5.693 5.558 5.870 ns
5.420 5.842 6.449 6.285 6.687 5.842 6.449 6.285 6.687 ns
3.3-V
LVCMOS
GCLK tco
8mA
GCLK
PLL
tco
GCLK tco
12mA
GCLK
PLL
tco
3.340
3.719
3.347
3.726
3.340
3.732
3.347
3.739
4.627 5.020 5.492 5.357 5.669 5.020 5.492 5.357 5.669 ns
5.213 5.645 6.248 6.084 6.486 5.645 6.248 6.084 6.486 ns
4.621 4.999 5.466 5.331 5.643 4.999 5.466 5.331 5.643 ns
5.207 5.624 6.222 6.058 6.460 5.624 6.222 6.058 6.460 ns
GCLK tco
16mA
GCLK
PLL
tco
3.331
3.710
3.331
3.723
4.599 4.974 5.437 5.302 5.614 4.974 5.437 5.302 5.614 ns
5.184 5.599 6.193 6.029 6.431 5.599 6.193 6.029 6.431 ns
GCLK tco
4mA
GCLK
PLL
tco
3.453
3.831
3.453
3.845
4.797 5.181 5.653 5.518 5.830 5.181 5.653 5.518 5.830 ns
5.382 5.805 6.409 6.245 6.647 5.805 6.409 6.245 6.647 ns
3.0-V
LVTTL
GCLK tco
8mA
GCLK
PLL
tco
GCLK tco
12mA
GCLK
PLL
tco
3.342
3.724
3.306
3.686
3.342
3.734
3.306
3.698
4.667 5.047 5.515 5.381 5.691 5.047 5.515 5.381 5.691 ns
5.252 5.674 6.272 6.109 6.509 5.674 6.272 6.109 6.509 ns
4.604 4.978 5.441 5.307 5.618 4.978 5.441 5.307 5.618 ns
5.189 5.602 6.198 6.035 6.435 5.602 6.198 6.035 6.435 ns
GCLK tco
16mA
GCLK
PLL
tco
3.288
3.667
3.288
3.680
4.575 4.950 5.413 5.278 5.590 4.950 5.413 5.278 5.590 ns
5.160 5.575 6.169 6.005 6.407 5.575 6.169 6.005 6.407 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2
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