EP3SE80F780I4N Datasheet, PDF (101/341 Pages) Altera Corporation – Chapter Revision Dates

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–91
Table 1–58. EP3SL70 Row Pins Output Timing Parameters (Part 2 of 3)
I/O Standard
Clock
DIFFERENTIAL
1.5-V
HSTL CLASS I
6mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.5-V
HSTL CLASS I
8mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.8-V
HSTL CLASS I
4mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.8-V
HSTL CLASS I
6mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.8-V
HSTL CLASS I
8mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
GCLK t_co
1.8-V
10mA _GCLK
HSTL CLASS I
PLL ^tco
DIFFERENTIAL
GCLK t_co
1.8-V
12mA _GCLK
HSTL CLASS I
PLL ^tco
DIFFERENTIAL
GCLK t_co
1.8-V
16mA _GCLK
HSTL CLASS II
PLL ^tco
DIFFERENTIAL
1.5-V
SSTL CLASS I
4mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.5-V
SSTL CLASS I
6mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.5-V
SSTL CLASS I
8mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.8-V
SSTL CLASS I
4mA
GCLK t_co
GCLK
PLL ^tco
DIFFERENTIAL
1.8-V
SSTL CLASS I
6mA
GCLK t_co
GCLK
PLL ^tco
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL= V_CCL=
1.1 V 0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL= V_CCL=
1.1 V 0.9 V
Units
3.091
3.326 4.733 5.149 5.676 5.532 5.731 5.284 5.815 5.671 5.800 ns
3.071
3.306 4.710 5.125 5.653 5.509 5.708 5.261 5.791 5.647 5.776 ns
3.068
3.302 4.706 5.122 5.649 5.505 5.704 5.257 5.788 5.644 5.773 ns
3.073
3.306 4.697 5.110 5.635 5.491 5.690 5.244 5.772 5.628 5.757 ns
3.066
3.299 4.696 5.111 5.638 5.494 5.693 5.247 5.777 5.633 5.762 ns
3.094
3.328 4.724 5.138 5.664 5.520 5.719 5.273 5.802 5.658 5.787 ns
3.076
3.311 4.709 5.123 5.649 5.505 5.704 5.258 5.787 5.643 5.772 ns
3.062
3.295 4.686 5.099 5.624 5.480 5.679 5.234 5.762 5.618 5.747 ns
2.668
2.842 3.979 4.346 4.821 4.685 4.892 4.453 4.930 4.795 4.940 ns
3.062
3.288 4.646 5.055 5.575 5.431 5.630 5.186 5.709 5.565 5.694 ns
3.044
3.278 4.684 5.101 5.629 5.485 5.684 5.237 5.770 5.626 5.755 ns
2.668
2.842 3.979 4.346 4.821 4.685 4.892 4.453 4.930 4.795 4.940 ns
3.062
3.288 4.646 5.055 5.575 5.431 5.630 5.186 5.709 5.565 5.694 ns
3.044
3.278 4.684 5.101 5.629 5.485 5.684 5.237 5.770 5.626 5.755 ns
2.668
2.842 3.979 4.346 4.821 4.685 4.892 4.453 4.930 4.795 4.940 ns
3.062
3.288 4.646 5.055 5.575 5.431 5.630 5.186 5.709 5.565 5.694 ns
3.044
3.278 4.684 5.101 5.629 5.485 5.684 5.237 5.770 5.626 5.755 ns
3.098
3.331 4.730 5.145 5.672 5.528 5.727 5.280 5.809 5.665 5.794 ns
3.084
3.317 4.717 5.132 5.659 5.515 5.714 5.266 5.796 5.652 5.781 ns
3.080
3.313 4.715 5.132 5.660 5.516 5.715 5.266 5.798 5.654 5.783 ns
3.096
3.328 4.716 5.129 5.654 5.510 5.709 5.263 5.791 5.647 5.776 ns
3.085
3.318 4.712 5.125 5.651 5.507 5.706 5.260 5.788 5.644 5.773 ns
3.082
3.315 4.710 5.123 5.649 5.505 5.704 5.258 5.787 5.643 5.772 ns
3.093
3.325 4.711 5.124 5.648 5.504 5.703 5.257 5.785 5.641 5.770 ns
3.083
3.316 4.709 5.122 5.647 5.503 5.702 5.257 5.785 5.641 5.770 ns
3.069
3.302 4.694 5.107 5.633 5.489 5.688 5.242 5.770 5.626 5.755 ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2