EP3SE80F780I4N Datasheet, PDF (26/341 Pages) Altera Corporation – Chapter Revision Dates

Table 1–20. PLL Specifications for Stratix III Devices (Part 3 of 3)
C2
C3, I3
C4, I4
C4L, I4L
Symbol
Parameter
V_CCL = 1.1 V
V_CCL = 1.1 V
V_CCL = 1.1 V
V_CCL = 1.1 V
V_CCL = 0.9 V
Unit
Min Typ Max Min Typ Max Min Typ Max Min Typ Max Min Typ Max
t_{OUTCCJ_IO} (5), (8)
t (5), _{CASC_OUTPJ_DC}
(7)
f_DRIFT
Cycle to Cycle Jitter for clock
output on regular IO
(F_OUT 100 MHz)
Cycle to Cycle Jitter for clock
output on regular IO
(F_OUT <100 MHz)
Period Jitter for dedicated clock
output in cascaded PLLs (F_OUT 
100 MHz)
Period Jitter for dedicated clock
output in cascaded PLLs (F_OUT
100 MHz)
Frequency drift after PFDENA is
disabled for duration of 100 s
— — 600 — — 600 — — 600 — — 600 — — 750 ps (p-p)
—
—
60
—
—
60
—
—
60
—
—
60
—
—
75
mUI
(p-p)
— — 250 — — 250 — — 250 — — 250 — — 325 ps (p-p)
—
—
25
—
—
25
—
—
25
—
—
25
—
— 32.5
mUI
(p-p)
— — ±10 — — ±10 — — ±10 — — ±10 — — ±10 %
Notes to Table 1–20:
(1) This specification is limited in the Quartus II software by the I/O maximum frequency. The maximum I/O frequency is different for each I/O standard.
(2) This specification is limited by the lower of the two: I/O f_max or f_out of the PLL.
(3) A high input jitter directly affects the PLL output jitter. To have low PLL output clock jitter, you must provide a clean clock source, which is less than 120 ps.
(4) F_REF is fIN/N when N = 1.
(5) Peak-to-peak jitter with a probability level of 10^–12 (14 sigma, 99.99999999974404% confidence level). The output jitter specification applies to the intrinsic jitter of the PLL, when an input jitter of 30 ps
is applied.
(6) High bandwidth PLL settings are not supported in external feedback mode.
(7) The cascaded PLL specification is only applicable with the following conditions:
a) Upstream PLL: 0.59 MHz  Upstream PLL BW < 1 MHz
b) Downstream PLL: Downstream PLL BW > 2 MHz
(8) External memory interface clock output jitter specifications use a different measurement method and are available in Table 1–33 on page 1–29.