Z80181 Datasheet, PDF (29/74 Pages) Zilog, Inc. – SMART ACCESS CONTROLLER (SAC™)

Zilog
MMU Registers
CBR
Addr 38h
Bit CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
Upon Reset
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Z80181
SMART ACCESS CONTROLLER SAC^™
MMU Common Base
Register
Figure 38. MMU Common Base Register
BBR
Addr 39h
Bit BB7 BB6 BB5 BB4 BB3 BB2 BB1 BB0
Upon Reset
0
0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Figure 39. MMU Bank Base Register
MMU Bank Base Register
CBAR
Addr 3Ah
Bit CA3 CA2 CA1 CA0 BA3 BA2 BA1 BA0
Upon Reset
1
1
1
1
0
0
0
0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
MMU Bank Area Register
MMU Common Area Register
Figure 40. MMU Common/Bank Area Register
DS971800500
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