DS152 Datasheet, PDF (49/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Table 65: Global Clock Input to Output Delay With MMCM
Symbol
Description
Device
Speed Grade
-3
-2
-1
LVCMOS25 Global Clock Input to Output Delay using Output Flip-Flop, 12mA, Fast Slew Rate, with MMCM.
T_ICKOFMMCMGC
Global Clock Input and OUTFF with
MMCM
XC6VLX75T
XC6VLX130T
2.34
2.35
2.50
2.51
2.77
2.78
XC6VLX195T
2.36
2.52
2.79
XC6VLX240T
2.36
2.52
2.79
XC6VLX365T
2.37
2.53
2.79
XC6VLX550T
N/A
2.55
2.82
XC6VLX760
N/A
2.54
2.82
XC6VSX315T
2.35
2.51
2.79
XC6VSX475T
N/A
2.43
2.70
XC6VHX250T
2.36
2.53
2.80
XC6VHX255T
2.46
2.63
2.91
XC6VHX380T
2.39
2.59
2.83
XC6VHX565T
N/A
2.54
2.81
Units
-1L
2.85
ns
2.87
ns
2.88
ns
2.88
ns
2.89
ns
2.93
ns
2.92
ns
2.87
ns
2.79
ns
N/A
ns
N/A
ns
N/A
ns
N/A
ns
Notes:
1. Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all
accessible IOB and CLB flip-flops are clocked by the global clock net.
2. MMCM output jitter is already included in the timing calculation.
Table 66: Clock-Capable Clock Input to Output Delay With MMCM
Symbol
Description
Device
Speed Grade
Units
-3
-2
-1
-1L
LVCMOS25 Clock-capable Clock Input to Output Delay using Output Flip-Flop, 12mA, Fast Slew Rate, with MMCM.
T_ICKOFMMCMCC
Clock-capable Clock Input and OUTFF
with MMCM
XC6VLX75T
XC6VLX130T
2.22
2.24
2.38
2.39
2.63
2.65
2.72
ns
2.74
ns
XC6VLX195T
2.24
2.40
2.65
2.75
ns
XC6VLX240T
2.24
2.40
2.65
2.75
ns
XC6VLX365T
2.25
2.42
2.65
2.76
ns
XC6VLX550T
N/A
2.43
2.68
2.80
ns
XC6VLX760
N/A
2.42
2.69
2.79
ns
XC6VSX315T
2.23
2.38
2.65
2.73
ns
XC6VSX475T
N/A
2.30
2.57
2.66
ns
XC6VHX250T
2.25
2.41
2.67
N/A
ns
XC6VHX255T
2.35
2.51
2.78
N/A
ns
XC6VHX380T
2.27
2.43
2.69
N/A
ns
XC6VHX565T
N/A
2.41
2.68
N/A
ns
Notes:
1. Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all
accessible IOB and CLB flip-flops are clocked by the global clock net.
2. MMCM output jitter is already included in the timing calculation.
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
49