DS152 Datasheet, PDF (23/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Performance Characteristics
This section provides the performance characteristics of some common functions and designs implemented in
Virtex-6 devices. The numbers reported here are worst-case values; they have all been fully characterized. These values are
subject to the same guidelines as the Switching Characteristics, page 24.
Table 41: Interface Performances
Description
-3
Networking Applications
SDR LVDS transmitter (using OSERDES; DATA_WIDTH = 4 to 8)
710 Mb/s
DDR LVDS transmitter (using OSERDES; DATA_WIDTH = 4 to 10)
1.4 Gb/s
SDR LVDS receiver (SFI-4.1)⁽¹⁾
710 Mb/s
DDR LVDS receiver (SPI-4.2)⁽¹⁾
1.4 Gb/s
Maximum Physical Interface (PHY) Rate for Memory Interfaces⁽²⁾⁽³⁾
DDR2
800 Mb/s
DDR3
1066 Mb/s
QDR II + SRAM
400 MHz
RLDRAM II
500 MHz
Speed Grade
-2
-1
710 Mb/s
1.3 Gb/s
710 Mb/s
1.3 Gb/s
650 Mb/s
1.25 Gb/s
650 Mb/s
1.0 Gb/s
800 Mb/s
1066 Mb/s
350 MHz
400 MHz
800 Mb/s
800 Mb/s
300 MHz
350 MHz
-1L
585 Mb/s
1.1 Gb/s
585 Mb/s
0.9 Gb/s
606 Mb/s
606 Mb/s
–
–
Notes:
1. LVDS receivers are typically bounded with certain applications where specific DPA algorithms dominate deterministic performance.
2. Verified on Xilinx memory characterization platforms designed according to the guidelines in theVirtex-6 FPGA Memory Interface Solutions
User Guide.
3. Consult theVirtex-6 FPGA Memory Interface Solutions Data Sheet for performance and feature information on memory interface cores
(controller plus PHY).
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
23