DS152 Datasheet, PDF (42/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Table 57: DSP48E1 Switching Characteristics (Cont’d)
Symbol
Description
Combinatorial Delays from Input Pins to Cascading Output Pins
T_{DSPDO_{A; B}_{ACOUT; BCOUT}}
T_{DSPDO_{A, B}_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_MULT
{A, B} input to {ACOUT, BCOUT} output
{A, B} input to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output using multiplier
T_{DSPDO_D_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_MULT
T_{DSPDO_{A, B}_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}
D input to {PCOUT, CARRYCASCOUT,
MULTSIGNOUT} output using multiplier
{A, B} input to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output not using multiplier
T_{DSPDO__{C, CARRYIN}_{PCOUT,}
CARRYCASCOUT,MULTSIGNOUT}
{C, CARRYIN} input to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output
Combinatorial Delays from Cascading Input Pins to All Output Pins
T_{DSPDO_{ACIN, BCIN}_{P, CARRYOUT}_MULT}
{ACIN, BCIN} input to {P, CARRYOUT}
output using multiplier
T_{DSPDO_{ACIN, BCIN}_{P, CARRYOUT}
{ACIN, BCIN} input to {P, CARRYOUT}
output not using multiplier
T_{DSPDO_{ACIN; BCIN}_{ACOUT; BCOUT}}
{ACIN, BCIN} input to {ACOUT,
BCOUT} output
T_{DSPDO_{ACIN, BCIN}_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_MULT
{ACIN, BCIN} input to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output using multiplier
T_{DSPDO_{ACIN, BCIN}_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}
{ACIN, BCIN} input to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output not using multiplier
T_{DSPDO_{PCIN, CARRYCASCIN, MULTSIGNIN}_}
{P, CARRYOUT}
T_{DSPDO_{PCIN, CARRYCASCIN, MULTSIGNIN}_ {PCOUT,}
CARRYCASCOUT, MULTSIGNOUT}
{PCIN, CARRYCASCIN, MULTSIGNIN}
input to {P, CARRYOUT} output
{PCIN, CARRYCASCIN, MULTSIGNIN}
input to {PCOUT, CARRYCASCOUT,
MULTSIGNOUT} output
Clock to Outs from Output Register Clock to Output Pins
T_{DSPCKO_{P, CARRYOUT}_PREG}
CLK (PREG) to {P, CARRYOUT} output
T_{DSPCKO_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_PREG
CLK (PREG) to {CARRYCASCOUT,
PCOUT, MULTSIGNOUT} output
Clock to Outs from Pipeline Register Clock to Output Pins
T_{DSPCKO_{P, CARRYOUT}_MREG}
T_{DSPCKO_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_MREG
CLK (MREG) to {P, CARRYOUT} output
CLK (MREG) to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output
T_{DSPCKO_{P, CARRYOUT}_ADREG_MULT}
CLK (ADREG) to {P, CARRYOUT}
output
T_{DSPCKO_{PCOUT, CARRYCASCOUT,}
MULTSIGNOUT}_ADREG_MULT
CLK (ADREG) to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT}
output
-3
0.49
3.87
3.66
1.64
1.46
3.67
1.43
0.36
3.76
1.52
1.19
1.28
0.38
0.50
1.72
1.81
2.79
2.87
Speed
-2
-1
0.56 0.65
4.42 5.24
4.17 4.94
1.86 2.19
1.66 1.95
4.19 4.97
1.63 1.92
0.42 0.49
4.29 5.10
1.73 2.05
1.35 1.60
1.46 1.72
0.43 0.50
0.56 0.66
1.96 2.30
2.06 2.43
3.16 3.72
3.26 3.84
Units
-1L
0.73 ns
6.09 ns
5.76 ns
2.60 ns
2.32 ns
5.75 ns
2.25 ns
0.56 ns
5.94 ns
2.44 ns
1.87 ns
2.06 ns
0.57 ns
0.76 ns
2.69 ns
2.88 ns
4.32 ns
4.51 ns
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
42