DS152 Datasheet, PDF (34/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Output Serializer/Deserializer Switching Characteristics
Table 51: OSERDES Switching Characteristics
Symbol
Description
Setup/Hold
T_{OSDCK_D}/T_{OSCKD_D}
T_{OSDCK_T}/T_{OSCKD_T(1)}
T_{OSDCK_T2}/T_{OSCKD_T2(1)}
D input Setup/Hold with respect to CLKDIV
T input Setup/Hold with respect to CLK
T input Setup/Hold with respect to CLKDIV
T_{OSCCK_OCE}/T_{OSCKC_OCE}
OCE input Setup/Hold with respect to CLK
T_{OSCCK_S}
T_{OSCCK_TCE}/T_{OSCKC_TCE}
SR (Reset) input Setup with respect to CLKDIV
TCE input Setup/Hold with respect to CLK
Sequential Delays
T_{OSCKO_OQ}
T_{OSCKO_TQ}
Combinatorial
Clock to out from CLK to OQ
Clock to out from CLK to TQ
T_{OSDO_TTQ}
T input to TQ Out
Notes:
1. T_{OSDCK_T2} and T_{OSCKD_T2} are reported as T_{OSDCK_T}/T_{OSCKD_T} in TRACE report.
-3
0.23/
–0.10
0.44/
–0.10
0.25/
–0.10
0.17/
–0.03
0.07
0.15/
–0.04
0.63
0.63
0.76
Speed Grade
-2
-1
0.28/
–0.10
0.51/
–0.09
0.27/
–0.09
0.20/
–0.03
0.07
0.19/
–0.04
0.31/
–0.10
0.56/
–0.08
0.31/
–0.08
0.22/
–0.03
0.07
0.21/
–0.04
0.71
0.82
0.71
0.82
0.84
0.97
Units
-1L
0.36/
ns
–0.15
0.68/
ns
–0.15
0.47/
ns
–0.15
0.27/
ns
–0.04
0.08
ns
0.29/
ns
–0.05
0.93
ns
0.93
ns
1.11
ns
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
34