English
Language : 

DS152 Datasheet, PDF (39/56 Pages) Xilinx, Inc – DC and Switching Characteristics
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Block RAM and FIFO Switching Characteristics
Table 56: Block RAM and FIFO Switching Characteristics
Symbol
Description
Block RAM and FIFO Clock-to-Out Delays
TRCKO_DO and TRCKO_DO_REG(1) Clock CLK to DOUT output (without output
register)(2)(3)
Clock CLK to DOUT output (with output
register)(4)(5)
TRCKO_DO_ECC and
TRCKO_DO_ECC_REG
Clock CLK to DOUT output with ECC
(without output register)(2)(3)
Clock CLK to DOUT output with ECC (with
output register)(4)(5)
TRCKO_CASC and
TRCKO_CASC_REG
TRCKO_FLAGS
TRCKO_POINTERS
TRCKO_SDBIT_ECC and
TRCKO_SDBIT_ECC_REG
Clock CLK to DOUT output with Cascade
(without output register)(2)
Clock CLK to DOUT output with Cascade
(with output register)(4)
Clock CLK to FIFO flags outputs(6)
Clock CLK to FIFO pointers outputs(7)
Clock CLK to BITERR (with output
register)
Clock CLK to BITERR (without output
register)
TRCKO_PARITY_ECC
Clock CLK to ECCPARITY in ECC encode
only mode
TRCKO_RDADDR_ECC and
TRCKO_RDADDR_ECC_REG
Clock CLK to RDADDR output with ECC
(without output register)
Clock CLK to RDADDR output with ECC
(with output register)
Setup and Hold Times Before/After Clock CLK
TRCCK_ADDR/TRCKC_ADDR
ADDR inputs(8)
TRDCK_DI/TRCKD_DI
DIN inputs(9)
TRDCK_DI_ECC/TRCKD_DI_ECC
TRCCK_CLK/TRCKC_CLK
DIN inputs with block RAM ECC in
standard mode(9)
DIN inputs with block RAM ECC encode
only(9)
DIN inputs with FIFO ECC in standard
mode(9)
Inject single/double bit error in ECC mode
TRCCK_RDEN/TRCKC_RDEN
Block RAM Enable (EN) input
TRCCK_REGCE/TRCKC_REGCE
CE input of output register
TRCCK_RSTREG/TRCKC_RSTREG Synchronous RSTREG input
TRCCK_RSTRAM/TRCKC_RSTRAM Synchronous RSTRAM input
-3
1.60
0.60
2.62
0.71
2.49
1.29
0.74
0.90
0.62
2.21
0.86
0.73
0.76
0.47/
0.27
0.84/
0.30
0.47/
0.30
0.68/
0.30
0.77/
0.30
0.90/
0.27
0.31/
0.26
0.18/
0.25
0.22/
0.23
0.32/
0.23
Speed Grade
-2
-1
1.79
2.08
0.66
0.75
2.89
3.30
0.77
0.86
2.77
3.18
1.41
1.58
0.81
0.91
0.98
1.09
0.68
0.76
2.46
2.84
0.94
1.06
0.79
0.90
0.82
0.92
0.53/
0.29
0.95/
0.32
0.52/
0.32
0.75/
0.32
0.87/
0.32
1.02/
0.28
0.35/
0.27
0.19/
0.27
0.24/
0.24
0.36/
0.24
0.62/
0.32
1.11/
0.34
0.59/
0.34
0.85/
0.34
1.02/
0.34
1.20/
0.29
0.41/
0.30
0.22/
0.31
0.28/
0.26
0.41/
0.27
Units
-1L
2.36 ns, Max
0.83 ns, Max
3.73 ns, Max
0.94 ns, Max
3.61 ns, Max
1.79 ns, Max
0.98 ns, Max
1.21 ns, Max
0.82 ns, Max
3.23 ns, Max
1.18 ns, Max
1.00 ns, Max
1.02 ns, Max
0.66/
0.34
1.26/
0.36
0.68/
0.36
0.97/
0.36
1.16/
0.36
1.56/
0.29
0.44/
0.31
0.24/
0.33
0.31/
0.27
0.46/
0.29
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
39