English
Language : 

DS152 Datasheet, PDF (29/56 Pages) Xilinx, Inc – DC and Switching Characteristics
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
I/O Standard Adjustment Measurement Methodology
Input Delay Measurements
Table 46 shows the test setup parameters used for measuring input delay.
Table 46: Input Delay Measurement Methodology
Description
I/O Standard Attribute
VL (1)(2)
VH(1)(2)
VMEAS
(1)(4)(5)
VREF
(1)(3)(5)
LVCMOS, 2.5V
LVCMOS, 1.8V
LVCMOS, 1.5V
HSTL (High-Speed Transceiver Logic),
Class I & II
HSTL, Class III
HSTL, Class I & II, 1.8V
HSTL, Class III 1.8V
SSTL (Stub Terminated Transceiver Logic),
Class I & II, 3.3V
SSTL, Class I & II, 2.5V
SSTL, Class I & II, 1.8V
LVDS (Low-Voltage Differential Signaling), 2.5V
LVDSEXT (LVDS Extended Mode), 2.5V
HT (HyperTransport), 2.5V
LVCMOS25
LVCMOS18
LVCMOS15
HSTL_I, HSTL_II
0
0
0
VREF – 0.5
2.5
1.8
1.5
VREF + 0.5
HSTL_III
HSTL_I_18, HSTL_II_18
HSTL_III_18
SSTL3_I, SSTL3_II
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 1.00
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 1.00
SSTL2_I, SSTL2_II
SSTL18_I, SSTL18_II
LVDS_25
LVDSEXT_25
LDT_25
VREF – 0.75
VREF – 0.5
1.2 – 0.125
1.2 – 0.125
0.6 – 0.125
VREF + 0.75
VREF + 0.5
1.2 + 0.125
1.2 + 0.125
0.6 + 0.125
1.25
0.9
0.75
VREF
VREF
VREF
VREF
VREF
VREF
VREF
0(6)
0(6)
0(6)
–
–
–
0.75
0.90
0.90
1.08
1.5
1.25
0.90
–
–
–
Notes:
1. The input delay measurement methodology parameters for LVDCI are the same for LVCMOS standards of the same voltage. Input delay
measurement methodology parameters for HSLVDCI are the same as for HSTL_II standards of the same voltage. Parameters for all other
DCI standards are the same for the corresponding non-DCI standards.
2. Input waveform switches between VLand VH.
3. Measurements are made at typical, minimum, and maximum VREF values. Reported delays reflect worst case of these measurements. VREF
values listed are typical.
4. Input voltage level from which measurement starts.
5. This is an input voltage reference that bears no relation to the VREF / VMEAS parameters found in IBIS models and/or noted in Figure 6.
6. The value given is the differential input voltage.
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
29