DS152 Datasheet, PDF (19/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Table 35: GTH Transceiver User Clock Switching Characteristics ⁽¹⁾
Symbol
Description
Conditions
F_TXOUT
F_RXOUT
TXUSERCLKOUT maximum frequency
RXUSERCLKOUT maximum frequency
F_TXIN
TXUSERCLKIN maximum frequency
F_RXIN
RXUSERCLKIN maximum frequency
16-bit data path
20-bit data path
32-bit data path
40-bit data path
64-bit data path
80-bit data path
64B/66B-bit data path
16-bit data path
20-bit data path
32-bit data path
40-bit data path
64-bit data path
80-bit data path
64B/66B-bit data path
Speed Grade
-3
-2
-1
350
350
323
350
350
323
350
350
323
280
280
258
350
350
323
280
280
258
175
175
162
140
140
129
170
170
157
350
350
323
280
280
258
350
350
323
280
280
258
175
175
162
140
140
129
170
170
157
Notes:
1. Clocking must be implemented as described in the Virtex-6 FPGA GTH Transceivers User Guide.
Table 36: GTH Transceiver Transmitter Switching Characteristics
Symbol
Description
Condition
Min
Typ
Max
T_RTX
T_FTX
TX Rise time
TX Fall time
T_LLSKEW
TX lane-to-lane skew
Transmitter Output Jitter⁽¹⁾⁽²⁾
20%–80%
80%–20%
within one GTH
Quad
across multiple
GTH Quads
TJ_11.18
DJ_11.18
TJ_10.3125
DJ_10.3125
TJ_9.953
DJ_9.953
TJ_2.667
DJ_2.667
TJ_2.488
DJ_2.488
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
11.181 Gb/s
10.3125 Gb/s
9.953 Gb/s
2.667 Gb/s
2.488 Gb/s
Notes:
1. These values are NOT intended for protocol specific compliance determinations.
2. All jitter values are based on a bit-error ratio of 1e^-12.
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Units
ps
ps
ps
ps
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
19