DS152 Datasheet, PDF (25/56 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Production Silicon and ISE Software Status
In some cases, a particular family member (and speed
grade) is released to production before a speed
specification is released with the correct label (Advance,
Preliminary, Production). Any labeling discrepancies are
corrected in subsequent speed specification releases.
Table 43 lists the production released Virtex-6 family
member, speed grade, and the minimum corresponding
supported speed specification version and ISE software
revisions. The ISE® software and speed specifications
listed are the minimum releases required for production. All
subsequent releases of software and speed specifications
are valid.
Table 43: Virtex-6 Device Production Software and Speed Specification Release
Device
-3
Speed Grade Designations
-2
-1
XC6VLX75T
ISE 12.2 v1.08
XC6VLX130T
ISE 12.1 v1.06
ISE 11.5 v1.05
ISE 11.5 v1.05
XC6VLX195T
ISE 12.1 v1.06
ISE 12.1 v1.06
ISE 12.1 v1.06
XC6VLX240T
ISE 12.1 v1.06
ISE 11.4.1 v1.04
ISE 11.4.1 v1.04
XC6VLX365T
ISE 12.2 v1.08
XC6VLX550T
N/A
ISE 12.2 v1.07
XC6VLX760
N/A
ISE 12.2 v1.08
XC6VSX315T
ISE 12.2 v1.08
ISE 12.1 v1.06
XC6VSX475T
N/A
ISE 12.2 v1.08
XC6VHX250T
XC6VHX255T
XC6VHX380T
XC6VHX565T
N/A
-1L
ISE 12.3 v1.07 Patch
ISE 12.2 v1.05
ISE 12.2 v1.04
ISE 12.2 v1.04
ISE 12.2 v1.04
ISE 12.2 v1.04
ISE 12.3 v1.07 Patch
ISE 12.3 v1.07 Patch
ISE 12.3 v1.07 Patch
N/A
N/A
N/A
N/A
Notes:
1. Blank entries indicate a device and/or speed grade in advance or preliminary status.
IOB Pad Input/Output/3-State Switching Characteristics
Table 44 summarizes the values of standard-specific data
input delay adjustments, output delays terminating at pads
(based on standard) and 3-state delays.
T_IOPI is described as the delay from IOB pad through the
input buffer to the I-pin of an IOB pad. The delay varies
depending on the capability of the SelectIO input buffer.
T_IOOP is described as the delay from the O pin to the IOB
pad through the output buffer of an IOB pad. The delay
varies depending on the capability of the SelectIO output
buffer.
T_IOTP is described as the delay from the T pin to the IOB
pad through the output buffer of an IOB pad, when 3-state is
disabled. The delay varies depending on the SelectIO
capability of the output buffer.
Table 45 summarizes the value of T_IOTPHZ. T_IOTPHZ is
described as the delay from the T pin to the IOB pad
through the output buffer of an IOB pad, when 3-state is
enabled (i.e., a high impedance state).
Table 44: IOB Switching Characteristics
I/O Standard
T_IOPI
Speed Grade
T_IOOP
Speed Grade
T_IOTP
Speed Grade
Units
-3 -2 -1 -1L -3 -2 -1 -1L -3 -2 -1 -1L
LVDS_25
0.85 0.94 1.09 1.08 1.45 1.54 1.68 1.62 1.45 1.54 1.68 1.62 ns
LVDSEXT_25
0.85 0.94 1.09 1.08 1.53 1.65 1.84 1.73 1.53 1.65 1.84 1.73 ns
HT_25
0.85 0.94 1.09 1.08 1.51 1.62 1.78 1.69 1.51 1.62 1.78 1.69 ns
DS152 (v2.10) October18, 2010
www.xilinx.com
Advance Product Specification
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